mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 91

• Manufacturer Part Number: mc68hc05l25
• Description: M68hc05 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 10
Serial Peripheral Interface
10.1 Introduction
The serial peripheral interface (SPI) is built into the MC68HC05L25 to transmit or receive synchronous
serial data. In this format, the serial clock is not included in the data stream and must be provided as a
separate signal.
When the SPI is enabled, reading port C will return the actual pin level.
The MSTR bit selects the source of the serial clock from the internal or the external clock. The internal
clock speed is selectable as 1/2 or 1/16 of the system clock.
10.2 Features
10.3 Block Diagram
Figure 10-1
10.3.1 Control
The control logic is an interface to the HC05 internal bus. It generates the clock start signal, when writing
to SPDR is detected in master mode. It also generates a flag clear signal and interrupt request to the CPU.
10.3.2 SPDR
The serial peripheral data register (SPDR) is an 8-bit shift register. This register can be read or written by
the CPU. It can also change parallel data to serial or vice versa.
10.3.3 SPCR
The serial peripheral control register (SPCR) contains bits SPIE, SPE, DORD, SPR, and MSTR. The
description on each bit can be found in
Freescale Semiconductor
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Full Duplex 3-Wire Synchronous Transfers
Master or Slave Operation
Bit Rate Selection
End of Transmission Interrupt
Data Collision Flag
Master Mode Maximum Serial Clock Speed at 1/2 the CPU System Clock
Slave Mode Maximum Serial Clock Speed Up until the CPU System Clock
illustrates the block diagram of the SPI module.
MC68HC05L25 Data Sheet, Rev. 3.1
10.5.1 Serial Peripheral Control
Register.
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