lm4550 National Semiconductor Corporation, lm4550 Datasheet - Page 20

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lm4550

Manufacturer Part Number
lm4550
Description
Ac ?97 Rev 2.1 Multi-channel Audio Codec With Stereo Headphone Amplifier, Sample Rate Conversion And National 3d Sound
Manufacturer
National Semiconductor Corporation
Datasheet

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Application Information
right channels.
Mixer Input Volume Registers (Index 0Ch - 18h)
These registers set the input volume levels including mute.
Each volume control is 5 bit which provides from a range of
+12dB gain to 34.5dB attenuation in 1.5dB steps. For stereo
ports, the left and right levels can be independently set.
Muting a given port is accomplished by setting the MSB to 1.
Setting the MSB to 1 for stereo ports mutes both the left and
right channel. Register 0Eh has an additional 20dB boost for
a microphone level input. This is enabled by setting bit 6 of
register 0Eh to 1.
Record Select Register (1Ah)
This register independently controls the source for the right
and left channel which will be recorded by the stereo ADC.
The default value is 0000h which corresponds to Mic in.
Record (Input) Gain Register (1Ch)
This registers controls the Record (Input) Gain level for the
stereo input selected via the Record Select Control Register
(1Ah). The gain can be programmed from 0dB to +22.5dB in
1.5dB steps. The level for the left and right channel can be
individually controlled. The input can also be muted by set-
Default: 0000h
Default: 8008h (mono regs.), 8808h (stereo regs.)
SR2:SR0
SL2:SL0
Mute
Mute
0
0
1
0
0
0
1
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Gx4:Gx0
XXXXX
PV3:0
00000
01000
XXXX
11111
0000
1111
Right Record Source
Left Record Source
Stereo Mix (R)
Stereo Mix (L)
Mono Mix (R)
Mono Mix (L)
Video In (R)
Video In (L)
Line In (R)
Line In (L)
Aux In (R)
Aux In (L)
CD In (R)
CD In (L)
Phone
Phone
Mic
Mic
34.5dB attenuation
45dB attenuation
0dB attenuation
+12dB gain
Function
Function
0dB gain
mute
mute
(Continued)
20
ting the MSB to 1.
General Purpose Register (20h)
This register controls many miscellaneous functions imple-
mented on the LM4550. The miscellaneous functions include
POP which allows the PCM to bypass the National 3D
Sound circuitry, 3D which enables or disables the National
3D Sound circuitry, MIX which selects the MONO_OUT
source, MS which selects the microphone mux source and
LPBK which connects the output of the stereo ADC to input
of the stereo DAC. LPBK provides for a digital loopthru path
when enabled.
Powerdown Control / Status Register (26h)
This read/write register is used to monitor subsystem readi-
ness and also to program the LM4550 powerdown states.
The lower half of this register is read only with a "1", indicat-
ing the subsection is ready. Writing to the lower 8 bits will
have no effect.
When the AC Link "Codec Ready" indicator bit (SDATA_IN
slot 0, bit 15) is a "1", it indicates that the AC Link and AC ’97
registers are in a fully operational state. The AC ’97 Control-
ler must further probe the Powerdown Control / Status Reg-
ister to determine exactly which subsections are ready.
Supported powerdown modes.
Default: 8000h
EAPD
LPBK
Mute
POP
DAC
ADC
PRO
REF
ANL
PR1
PR2
PR3
PR4
PR5
PR6
MIX
BIT
BIT
BIT
MS
3D
0
0
1
PCM in ADC’s and Input Mux powerdown
PCM out path and mute, 0 = pre 3D, 1 =
Analog Mixer powerdown (VREF still on)
Digital Interface (AC Link) powerdown
Gx3:Gx0
Analog Mixer powerdown (VREF off)
Mono output select 0 = Mix, 1 = Mic
ADC section ready to transmit data
XXXX
National 3D Sound on / off 1 = on
DAC section ready to accept data
0000
1111
External amplifier powerdown
Mic select 0 = Mic1 1 = Mic2
PCM out DAC’s powerdown
Vref’s up to nominal level
Headphone powerdown
Analog mixers ready
ADC/DAC loopback
Internal Clk disable
(external clk off)
Function
Function
Function
post 3D
22.5dB gain
Function
0dB gain
mute

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