lan9312 Standard Microsystems Corp., lan9312 Datasheet - Page 243

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lan9312

Manufacturer Part Number
lan9312
Description
Lan9312 High Performance Two Port 10/100 Managed Ethernet Switch With 32-bit Non-pci Cpu Interface
Manufacturer
Standard Microsystems Corp.
Datasheet

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.2.7
14.2.7.1
31:16
BITS
15:0
RESERVED
MII Data
This field contains the value written to the PHYs. For a write operation, this
register should be first written with the desired data.
PHY Management Interface (PMI)
The PMI registers are used (by the EEPROM Loader only) to indirectly access the PHY registers.
Refer to
information on the PHY registers.
Note: These registers are only accessible by the EEPROM Loader and NOT by the Host bus. Refer
PHY Management Interface Data Register (PMI_DATA)
This register is used in conjunction with the
(PMI_ACCESS)
Note: This register is only accessible by the EEPROM Loader and NOT by the Host bus. Refer to
to
Section 10.2.4, "EEPROM Loader," on page 149
Offset:
Section 14.4, "Ethernet PHY Control and Status Registers," on page 286
Section 10.2.4, "EEPROM Loader," on page 149
to perform write operations to the PHYs.
0A4h
EEPROM Loader
Access Only
DESCRIPTION
DATASHEET
243
Size:
PHY Management Interface Access Register
for additional information.
for additional information.
32 bits
TYPE
WO
RO
Revision 1.2 (04-08-08)
for additional
00000000h
DEFAULT
-

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