lan9312 Standard Microsystems Corp., lan9312 Datasheet - Page 70

• Manufacturer Part Number: lan9312
• Description: Lan9312 High Performance Two Port 10/100 Managed Ethernet Switch With 32-bit Non-pci Cpu Interface
• Manufacturer: Standard Microsystems Corp.

Revision 1.2 (04-08-08)
6.4.4
6.4.5
01 - Blocking
(also used for
disabled)
Port State
Member
Port 2
VLAN Support
The switch engine supports 16 active VLANs out of a possible 4096. The VLAN table contains the 16
active VLAN entries, each consisting of the VID, the port membership, and un-tagging instructions.
On ingress, if a packet has a VLAN tag containing a valid VID (not 000h or FFFh), the VID table is
searched. If the VID is found, the VLAN is considered active and the membership and un-tag
instruction is used. If the VID is not found, the VLAN is considered foreign and the membership result
is NULL. A NULL membership will result in the packet being filtered if Enable Membership Checking
is set. A NULL membership will also result in the packet being filtered if the destination address is not
found in the ALR table (since the packet would have no destinations).
On ingress, if a packet does not have a VLAN tag or if the VLAN tag contains VID with a value of 0
(priority tag), the packet is assigned a VLAN based on the Port Default VID (PVID) and Priority. The
PVID is then used to access the above VLAN table.
The VLAN membership of the packet is used for ingress and egress checking and for VLAN broadcast
domain containment. The un-tag instructions are used at egress on ports defined as hybrid ports.
Refer to
register descriptions.
Spanning Tree Support
Hardware support for the Spanning Tree Protocol (STP) and the Rapid Spanning Tree Protocol (RSTP)
includes a per port state register as well as the override bit in the MAC Address Table entries
6.4.1.5, on page
The
modes as shown in
forwarding. Port 0 should normally be left in forwarding mode.
17
Switch Engine Port State Register (SWE_PORT_STATE)
Received packets on the port are
discarded.
Transmissions to the port are blocked.
Learning on the port is disabled.
Section 14.5.3.8, on page 376
Un-tag
Port 2
16
64) and the host CPU port special tagging
Hardware Action
Member
Port 1
15
Table
Figure 6.6 VLAN Table Entry Structure
Table 6.2 Spanning Tree States
6.2. Normally only Port 1 and Port 2 are placed into modes other than
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Un-tag
Port 1
14
DATASHEET
Member
through
13
MII
70
The MAC Address Table should be programmed
with entries that the host CPU needs to receive
(e.g. the BPDU address). The static and override
bits should be set.
The host CPU should not send any packets to the
port in this state.
The host CPU should discard received packets
from this port when in the Disabled state.
Note:
Section 14.5.3.11, on page 379
Un-tag
12
MII
There is no hardware distinction between
the Blocking and Disabled states.
11
(Section 6.4.10, on page
is used to place a port into one of the
Software Action
VID
...
for detailed VLAN
75).
SMSC LAN9312
0
Datasheet
(Section