w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 94

• Manufacturer Part Number: w83l950d
• Description: Peripheral Personal Computer Keyboard Controller
• Manufacturer: Winbond Electronics Corp America

22.6 Auxiliary SMBus Host/Slave Mode and FIFO Level Length Register(AHMR)
22.7 Auxiliary SMBus Host/Slave FIFO Control Register (AFCR)
Advanced SFR Address
Default Value
Attribute:
Advanced SFR Address
Default Value
Attribute:
7:5
4:0
7:4
3
2
1:0
Bit
Bit
Host/Slave Mode (HS_MODE). These two bits indicate the SMBus controller state.
Host/Slave FIFO Level Length. Indicate the number of byte is stay in Data FIFO.
Reserved.
Write Tag Command (TAG). Master-transmit will be terminated a package transmission in
the Data FIFO when writes a TAG command before the last byte that for written. Note that
this bit should write first before the last byte is written to the Data FIFO. This bit will be
automatically clear to 0.
Note: Set this bit is used to generate a STOP or REPEAT START.
Reset Data FIFO (RST_DATAFIFO). Set this bit to 1, the data FIFO will be clear and the
FIFO read/write pointer will be set to zero. This bit will be normal operation when set to 0.
Transmit or Receive FIFO Threshold Level (TXRX_LEVEL). These two bits are used to
active the threshold interrupt when Transmitter or Receiver Data FIFO is below or over
threshold level, respectively.
Bit1:0
00
01
10
11
Bit7:5
000
100
101
110
111
Others
0x2D
0x00
0x2E
0x00
Read/Write
Read Only
RX/TX FIFO Threshold
Mode
Standby
Master transmit
Master receive
Slave transmit
Slave receive
Reserved.
13
1
4
8
Description
Description
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Publication Release Date: June 23, 2003
W83L950D
Revision 1.0