tda5225 Infineon Technologies Corporation, tda5225 Datasheet - Page 113

• Manufacturer Part Number: tda5225
• Description: Enhanced Sensitivity Multi-channel Quad-conf Igurat Ion Receiver With Digital Slicer
• Manufacturer: Infineon Technologies Corporation

Table 1
Register Short Name
C_PDECSCASK
C_MFC
C_SRC
C_EXTSLC
C_CHCFG
C_PLLINTC1
C_PLLFRAC0C1
C_PLLFRAC1C1
C_PLLFRAC2C1
C_PLLINTC2
C_PLLFRAC0C2
C_PLLFRAC1C2
C_PLLFRAC2C2
C_PLLINTC3
C_PLLFRAC0C3
C_PLLFRAC1C3
C_PLLFRAC2C3
D_IF1
D_WURSSITH1
D_WURSSIBL1
D_WURSSIBH1
D_WURSSITH2
D_WURSSIBL2
D_WURSSIBH2
D_WURSSITH3
D_WURSSIBL3
D_WURSSIBH3
D_WULOT
D_AFCLIMIT
D_AFCAGCD
D_AFCSFCFG
D_AFCK1CFG0
D_AFCK1CFG1
D_AFCK2CFG0
Data Sheet
Register Overview (cont’d)
Register Long Name
Pre Decimation Scaling Register ASK Mode
Matched Filter Control Register
Sampe Rate Converter NCO Tune
Externel Data Slicer Configuration
PLL MMD Integer Value Register Channel 1
PLL Fractional Division Ratio Register 0 Channel 1 25A
PLL Fractional Division Ratio Register 1 Channel 1 25B
PLL Fractional Division Ratio Register 2 Channel 1 25C
PLL MMD Integer Value Register Channel 2
PLL Fractional Division Ratio Register 0 Channel 2 25E
PLL Fractional Division Ratio Register 1 Channel 2 25F
PLL Fractional Division Ratio Register 2 Channel 2 260
PLL MMD Integer Value Register Channel 3
PLL Fractional Division Ratio Register 0 Channel 3 262
PLL Fractional Division Ratio Register 1 Channel 3 263
PLL Fractional Division Ratio Register 2 Channel 3 264
RSSI Wake-Up Threshold for Channel 1 Register 31B
RSSI Wake-Up Blocking Level Low Channel 1
Register
RSSI Wake-Up Blocking Level High Channel 1
Register
RSSI Wake-Up Threshold for Channel 2 Register 31E
RSSI Wake-Up Blocking Level Low Channel 2
Register
RSSI Wake-Up Blocking Level High Channel 2
Register
RSSI Wake-Up Threshold for Channel 3 Register 321
RSSI Wake-Up Blocking Level Low Channel 3
Register
RSSI Wake-Up Blocking Level High Channel 3
Register
Wake-Up on Level Observation Time Register
AFC Limit Configuration Register
AFC/AGC Freeze Delay Register
AFC Start/Freeze Configuration Register
AFC Integrator 1 Gain Register 0
AFC Integrator 1 Gain Register 1
AFC Integrator 2 Gain Register 0
Channel Configuration Register
IF1 Register
113
Offset Address
23B
23C
23D
23E
258
259
25D
261
316
31C
31D
31F
320
322
323
325
32A
32B
32C
32D
32E
32F
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Register Overview
V1.0, 2010-02-19
Page Number
Appendix
TDA5225