tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 96

• Manufacturer Part Number: tda5235
• Description: Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
• Manufacturer: Infineon Technologies Corporation

Figure 68
2.6.1.2
In Run Mode Slave, the receiver is able to continuously scan for incoming data streams.
Detection and validation of a wake-up criterion are not performed, but RUNIN and TSI
are required.
Recognition of TSI and validation of the optional MID (Message IDentification) are done
automatically. The data payload is extracted from the data stream, and moved to the
FIFO.
The various recognition steps are communicated by interrupts. Interrupts can be
generated at frame-start (when a valid TSI has been detected), when a valid MID has
been found and at EOM (End of Message).
Alternatively, a transparent data stream can also be processed externally by the
Application Controller (see
Run Mode Slave is entered by setting SFR CMC0 bits MSEL to 0 and SLRXEN to 1.
Data Sheet
Run Mode Slave (RMS)
Bit:SLRXEN == 0
Bit:MSEL == 0
Bit:SLRXEN == X
Bit:MSEL == 0
ToTim Timeout == X
Global State Diagram
Reset
Bit:SLRXEN == X
Bit:MSEL == 0
Sleep Mode
Bit:SLRXEN == X
Bit:MSEL == 1
EOM2SPM == 1
Chip is idle
Bit:SLRXEN == 1
Bit:MSEL == 0
Bit:SLRXEN == X
Bit:MSEL == 0
Chapter 2.5.1.2 Data
Bit:SLRXEN == X
Bit:MSEL == 1
Bit:SLRXEN == X
Bit:MSEL == 1
ToTim Timeout == 1
Bit:SLRXEN == 0
Bit:MSEL == 1
or
Chip is periodically active
Chip is permanently
Bit:SLRXEN == X
Bit:MSEL == 1
Self Polling
and searching for
Self Polling
Initialize RX-Part
Initialize RX-Part
Run Mode
Bit:SLRXEN == 0
Bit:MSEL == 1
or
WU criteria
Mode
active
96
Init
Init
Interface).
Bit:SLRXEN == 1
Bit:MSEL == 0
Bit:SLRXEN == X
Bit:MSEL == 1
ToTim Timeout == 0
Chip is permanently
Bit:SLRXEN == X
Bit:MSEL == 1
WUC found == 0
Bit:SLRXEN == X
Bit:MSEL == 1
WUC found == 1
Run Mode
Slave
active
Functional Description
Bit:SLRXEN == 1
Bit:MSEL == 0
V1.0, 2010-02-19
TDA5235