sak-xc888clm-8ffa Infineon Technologies Corporation, sak-xc888clm-8ffa Datasheet - Page 60

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sak-xc888clm-8ffa

Manufacturer Part Number
sak-xc888clm-8ffa
Description
High Performance 8-bit Microcontroller With On-chip Flash Memory And Can
Manufacturer
Infineon Technologies Corporation
Datasheet

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3.4.3
Each interrupt source, except for NMI, can be individually programmed to one of the four
possible priority levels. The NMI has the highest priority and supersedes all other
interrupts. Two pairs of interrupt priority registers (IP and IPH, IP1 and IPH1) are
available to program the priority level of each non-NMI interrupt vector.
A low-priority interrupt can be interrupted by a high-priority interrupt, but not by another
interrupt of the same or lower priority. Further, an interrupt of the highest priority cannot
be interrupted by any other interrupt source.
If two or more requests of different priority levels are received simultaneously, the
request of the highest priority is serviced first. If requests of the same priority are
received simultaneously, then an internal polling sequence determines which request is
serviced first. Thus, within each priority level, there is a second priority structure
determined by the polling sequence shown in
Table 21
Source
Non-Maskable Interrupt (NMI)
External Interrupt 0
Timer 0 Interrupt
External Interrupt 1
Timer 1 Interrupt
UART Interrupt
Timer 2,UART Fractional Divider, MCAN, LIN
Interrupt
ADC, MCAN Interrupt
SSC Interrupt
External Interrupt 2, Timer 21, UART1, UART1
Fractional Divider, MDU, CORDIC Interrupt
External Interrupt [6:3], MCAN Interrupt
CCU6 Interrupt Node Pointer 0, MCAN interrupt 11
CCU6 Interrupt Node Pointer 1, MCAN Interrupt 12
CCU6 Interrupt Node Pointer 2, MCAN Interrupt 13
CCU6 Interrupt Node Pointer 3, MCAN Interrupt 14
Data Sheet
Prelimary
Interrupt Priority
Priority Structure within Interrupt Level
56
Table
Level
(highest)
1
2
3
4
5
6
7
8
9
10
21.
Functional Description
XC886/888CLM
V0.1, 2006-02

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