sak-xc888clm-8ffa Infineon Technologies Corporation, sak-xc888clm-8ffa Datasheet - Page 93

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sak-xc888clm-8ffa

Manufacturer Part Number
sak-xc888clm-8ffa
Description
High Performance 8-bit Microcontroller With On-chip Flash Memory And Can
Manufacturer
Infineon Technologies Corporation
Datasheet

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For module clock f
shown in
Table 33
Module Clock f
24 MHz
As f
24 MHz. During slow-down mode where f
CTC can be set to 00
10 MHz. However, it is important to note that the conversion error could increase due to
loss of charges on the capacitors, if f
3.18.2
The analog-to-digital conversion procedure consists of the following phases:
• Synchronization phase (t
• Sample phase (t
• Conversion phase
• Write result phase (t
Figure 36
Data Sheet
Prelimary
SAMPLE Bit
BUSY Bit
ADCI
f
ADCI
cannot exceed 10 MHz, bit field CTC should not be set to 00
Table
ADC Conversion Sequence
conversion start
trigger
f
ADC Conversion Timing
ADCI
33.
ADC
t
SYN
ADC
S
Frequency Selection
)
Sample Phase
WR
= 24 MHz, the analog clock f
B
CTC
00
01
10
11
as long as the divided analog clock f
)
B
B
B
B
t
S
SYN
(default)
)
t
CONV
ADC
Conversion Phase
becomes too low during slow-down mode.
ADC
89
Prescaling Ratio
÷ 2
÷ 3
÷ 4
÷ 32
may be reduced to 12 MHz, 6 MHz etc.,
ADCI
interrupt
Source
frequency can be selected as
Write Result Phase
Functional Description
ADCI
Analog Clock f
12 MHz (N.A)
8 MHz
6 MHz
750 kHz
t
WR
Channel
interrupt
XC886/888CLM
does not exceed
B
when f
V0.1, 2006-02
interrupt
Result
ADCI
ADC
is

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