lm2324 National Semiconductor Corporation, lm2324 Datasheet - Page 6

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lm2324

Manufacturer Part Number
lm2324
Description
Pllatinum? 2.0 Ghz Frequency Synthesizer For Rf Personal Communications
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
2.0 Programming Description
2.1 MICROWIRE INTERFACE
The LMX2324 register set can be accessed through the MICROWIRE interface. A 18-bit shift register is used as a temporary reg-
ister to indirectly program the on-chip registers. The shift register consists of a 17-bit DATA[16:0] field and a 1-bit address (ADDR)
field as shown below. The address field is used to decode the internal register address. Data is clocked into the shift register in
the direction from MSB to LSB, when the CLOCK signal goes high. On the rising edge of Load Enable (LE) signal, data stored
in the shift register is loaded into the addressed latch.
2.1.1 Registers’ Address Map
When Load Enable (LE) is transitioned high, data is transferred from the 18-bit shift register into the appropriate latch depending
on the state of the ADDRESS bit. A multiplexing circuit decodes the address bit and writes the data field to the corresponding in-
ternal register.
MSB
17
ADDRESSED
REGISTER
R Register
N Register
DATA[16:0]
6
1
ADDRESS BIT
ADDR
ADDR
1
0
0
LSB

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