ca3277 Intersil Corporation, ca3277 Datasheet - Page 3

• Manufacturer Part Number: ca3277
• Description: Dual 5v Regulator With Serial Data Buffer Interface For Microcontroller Applications
• Manufacturer: Intersil Corporation

Electrical Specifications
NOTES:
DATA COMPARATOR
Data Comp Thd
Data Comp Hysteresis
DATA OUT Low
DATA OUT High
DATA OUT Low Sink Current
DATA OUT High Source Current
IGNITION COMPARATOR
Ign Comp Thd
Ign Comp Hysteresis
IGN OUT Low
IGN OUT High
IGN OUT Low Sink Current
IGN OUT High Source Current
OTHER PARAMETERS
Idle Current
Over-Voltage Shutdown
Thermal Shutdown
Ripple Rejection
1. For negative voltages on the BATT and IGN IN inputs, current drain is primarily reverse junction leakage, except when DATA IN, CUR
2. For negative voltage DATA IN, CUR OUT, ENABLE and RESET interface to NPN or equivalent on-chip structures; providing a forward
3. Refer to the Electrical Characteristic TABLE for all Self-Limiting values.
4. Dissipation, approximately equals: P
5. Dropout Voltage is V
6. Reset Delay Time, t
OUT, ENABLE and RESET are directly connected to BATT. (Note 2)
junction for current conduction into the IC. Negative current must be limited by the impedance of the external connection. This is also the
case where these terminals are interconnected to BATT, Normal application does not require the BATT connection, except for DATA IN
where a series diode for reverse current blocking may be used. (see Description text information)
pation and V
evaluation, the CRST pin may be discharged repetitively with a transistor switch. The RESET pin switches from low to high when the
CRST pin is charged to approximately 3V. Normal ATE testing measures the source charging current. which is typically 10 A. For any
other value of Capacitor the charge time, t for reset is determined as follows: t
(i.e. C = 0.47 F, t = 141ms)
PARAMETERS
OUT1
~
V
RST
OUT2
DO1
is the time period that the RESET (Pin 8) is low following the discharge of the CRST capacitor to ground. For test
~
= (V
5V. This assumes neglibible dissipation for the Ignition Comp., Reset and Data Comp. Outputs.
T
OUT2 bypassed with 20 F to GND, DATA IN connected through 250 to BATT, LOADS: OUT1 = 50mA,
OUT2 = 80mA; Unless Otherwise Specified (Refer to Figure 4 Test Circuit) (Continued)
BATT
A
= -40
- V
V
SYMBOL
BATT(OVSD)
D
o
OUT1
C to +85
V
V
V
V
I
I
I
I
T
OH
OH
I
OH
OH
OL
OL
OL
OL
Q
[(V
J
) for REG. OUT1 and V
IN
I
IN
Specifications CA3277
o
C, V
) + (V
V
V
V
V
V
V
V
Ramp V
down
1V
Ripple on OUT1, OUT2
BATT
BATT
DATA IN
DATA IN
IGN IN
IGN IN
BATT
BATT
PP
CUR OUT
at 3kHz on BATT INPUT, Measure AC
= 16V, V
= 16V, V
= 12.6V, No Loads, V
= 13.5V, ENABLE ON (V
Low
High
BATT
Low
High
I
CUR OUT
7-41
Up Until OUT1 and OUT2 Shut-
DATA IN
DATA IN
CONDITIONS
DO2
) - 5(I
= (V
= (V
= 16V
BATT
OUT1
BATT
EN
~
- V
+I
= V
308C, where C is in F and t is in milliseconds.
EN
-5V)
OUT2
OUT2
IGN IN
= 3.5V), IGN IN connected to BATT, OUT1 and
)], where I
) for REG. OUT2
= 0V
IN
V
V
V
-0.15
- 3.6
MIN
OUT1
5.5
4.6
IN
BATT
19
45
-
-
-
-
-
-
-
-
-
-
is IGN IN and BATT input dissi-
V
TYP
20.5
-2.9
200
200
500
150
-50
-70
BATT
55
1
6
1
-
-
-
V
MAX
0.15
5.25
0.15
5.25
-2.2
800
6.5
BATT
23
-
-
-
-
-
-
-
-
UNITS
mV
mA
mV
mA
dB
o
V
V
V
V
V
V
V
C
A
A
A