74abt821pw NXP Semiconductors, 74abt821pw Datasheet - Page 8

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74abt821pw

Manufacturer Part Number
74abt821pw
Description
10-bit D-type Flip-flop; Positive-edge Trigger 3-state
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Table 8:
GND = 0 V; for test circuit see
12. Waveforms
9397 750 14867
Product data sheet
Symbol Parameter
t
t
t
t
t
t
t
t
t
f
PZL
PHZ
PLZ
su(H)
su(L)
h(H)
h(L)
WH
WL
max
output enable time to LOW-level
output disable time from HIGH-level
output disable time from LOW-level
set-up time HIGH Dn to CP
set-up time LOW Dn to CP
hold time HIGH Dn to CP
hold time LOW Dn to CP
pulse width HIGH of CP
pulse width LOW of CP
maximum clock frequency
Dynamic characteristics
Fig 5. Propagation delay clock input (CP) to output Qn, clock pulse (CP) width and
Fig 6. Set-up and hold times data output (Dn) to clock (CP)
Figure
V
V
maximum clock (CP) frequency
V
The shaded areas indicate when the input is permitted to change for predictable output
performance.
M
OL
M
8.
= 1.5 V
= 1.5 V
…continued
and V
Dn input
CP input
Qn output
CP input
OH
are typical voltage output drop that occur with the output load.
GND
Conditions
see
see
see
see
see
see
see
see
see
see
V
Rev. 02 — 12 April 2005
V
OH
OL
V
I
Figure 7
Figure 7
Figure 7
Figure 6
Figure 6
Figure 6
Figure 6
Figure 5
Figure 5
Figure 5
V
t
su(H)
M
10-bit D-type flip-flop; positive-edge trigger; 3-state
V
V
t
M
h(H)
M
t
PHL
V
t
WH
M
1/f
V
M
max
t
WL
V
t
su(L)
M
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
t
PLH
Min
2.2
2.7
2.3
2.1
2.1
1.3
1.3
2.9
3.8
-
t
V
h(L)
V
M
M
001aac445
001aac738
74ABT821
Typ
-
-
-
-
-
-
-
-
-
125
Max
6.3
6.7
6.5
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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