cy62138fv30 Cypress Semiconductor Corporation., cy62138fv30 Datasheet - Page 5

• Manufacturer Part Number: cy62138fv30
• Description: 2-mbit 256k X 8 Static Ram
• Manufacturer: Cypress Semiconductor Corporation.

Switching Characteristics
Notes
Document #: 001-08029 Rev. *E
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
11. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of V
12. At any given temperature and voltage condition, t
13. t
14. The internal write time of the memory is defined by the overlap of WE, CE
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
pulse levels of 0 to V
signals can terminate a write by going INACTIVE. Reference the data input setup and hold timing to the edge of the signal that terminates the write.
HZOE
Parameter
, t
HZCE
, and t
[14]
HZWE
CC(typ)
transitions are measured when the output enters a high impedance state.
, and output loading of the specified I
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
CE
CE
CE
CE
Write Cycle Time
CE
Address Setup to Write End
Address Hold from Write End
Address Setup to Write Start
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z
WE HIGH to Low-Z
1
1
1
1
1
1
LOW and CE
LOW and CE
HIGH or CE
LOW and CE
HIGH or CE
LOW and CE
(Over the Operating Range)
HZCE
2
2
2
2
2
2
LOW to High-Z
LOW to Power Down
[12]
HIGH to Data Valid
HIGH to Low Z
HIGH to Power Up
HIGH to Write End
is less than t
[12, 13]
[12]
[12,13]
Description
OL
/I
LZCE
OH
as shown in the
, t
[12, 13]
1
HZOE
[12]
= V
[11]
IL
is less than t
, and CE
““AC Test Loads and Waveforms” on page
2
= V
LZOE
IH
. All signals must be ACTIVE to initiate a write and any of these
, and t
HZWE
Min
is less than t
45
10
10
45
35
35
35
25
10
5
0
0
0
0
CY62138FV30 MoBL
45 ns
LZWE
for any given device.
Max
45
45
22
18
18
45
18
4” .
Page 5 of 13
CC(typ)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
/2, input
®
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