cy62138fv30 Cypress Semiconductor Corporation., cy62138fv30 Datasheet - Page 6

• Manufacturer Part Number: cy62138fv30
• Description: 2-mbit 256k X 8 Static Ram
• Manufacturer: Cypress Semiconductor Corporation.

Switching Waveforms
Read Cycle 1 (Address transition controlled)
Read Cycle No. 2 (OE controlled)
Write Cycle No. 1 (WE controlled)
Notes:
Document #: 001-08029 Rev. *E
15. The device is continuously selected. OE, CE
16. WE is HIGH for read cycle.
17. Address valid before or similar to CE
18. Data IO is high impedance if OE = V
19. If CE
20. During this period, the IOs are in output state. Do not apply input signals.
DATA OUT
CURRENT
ADDRESS
DATA OUT
ADDRESS
ADDRESS
SUPPLY
DATA IO
1
V
goes HIGH or CE
CE
OE
CC
WE
CE
OE
NOTE 20
2
goes LOW simultaneously with WE HIGH, the output remains in high impedance state.
PREVIOUS DATA VALID
HIGH IMPEDANCE
t
PU
IH
1
t
LZCE
.
t
transition LOW and CE
SA
t
[10, 16, 17]
HZOE
[10, 14, 18, 19]
t
t
1
LZOE
ACE
= V
t
OHA
IL
50%
t
, CE
DOE
[15, 16]
2
= V
IH
t
2
AA
.
t
transition HIGH.
AW
t
t
SCE
RC
t
WC
t
RC
RC
t
t
PWE
DATA VALID
SD
DATA VALID
CY62138FV30 MoBL
DATA VALID
t
t
HZOE
HA
t
HD
t
HZCE
t
PD
50%
IMPEDANCE
Page 6 of 13
HIGH
I
I
CC
SB
®
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