hyb18t512161bf-33 Infineon Technologies Corporation, hyb18t512161bf-33 Datasheet - Page 88

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hyb18t512161bf-33

Manufacturer Part Number
hyb18t512161bf-33
Description
512-mbit X16 Gddr2 Dram
Manufacturer
Infineon Technologies Corporation
Datasheet
6.1.1
The ODT function adds additional current consumption to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A6 & A2 in the EMRS(1) a “weak” or “strong” termination can be selected. The current
consumption for any terminated input pin depends on whether the input pin is in tri-state or driving “0” or “1”, as
long a ODT is enabled during a given period of time.. See
Table 43
ODT Current
Enabled ODT current per DQadded I
current for ODT enabled;
ODT is HIGH; Data Bus inputs are floating
Active ODT current per DQadded I
for ODT enabled;
ODT is HIGH; worst case of Data Bus inputs are
stable or switching.
Note: For power consumption calculations the ODT duty cycle has to be taken into account
Data Sheet
On Die Termination (ODT) Current
ODT current per terminated input pin
DDQ
DDQ
current
I
I
ODTO
ODTT
88
Table 43
EMRS(1) State
A6 = 0, A2 = 1
A6 = 1, A2 = 0
A6 = 1, A2 = 1
A6 = 0, A2 = 1
A6 = 1, A2 = 0
A6 = 1, A2 = 1
512-Mbit Double-Data-Rate-Two SDRAM
HYB18T512161BF–22/25/28/33
Min.
5
2.5
7.5
10
5
15
Specifications and Conditions
Typ.
6
3
9
12
6
18
05102005-C5U8-7TLE
Max.
7.5
3.75
11.25
15
7.5
22.5
Rev. 1.1, 2005-08
Unit
mA/DQ
mA/DQ
mA/DQ
mA/DQ
mA/DQ
mA/DQ

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