dsm2180f3 STMicroelectronics, dsm2180f3 Datasheet - Page 30

• Manufacturer Part Number: dsm2180f3
• Description: Dsm Digital Signal Processor System Memory For Analog Devices Adsp-218x Family 5v Supply
• Manufacturer: STMicroelectronics

DSM2180F3
Each Macrocell may only borrow product terms
from certain other Macrocells. Product terms al-
ready in use by one Macrocell are not available for
another Macrocell. Product term allocation does
not add any propagation delay to the logic.
If an equation requires more product terms than
are available to it through product term allocation,
then “external” product terms are required, which
consumes other Output Macrocells (OMC). This is
called product term expansion and also happens
automatically in PSDsoft Express
Product tern expansion causes additional propa-
gation delay because an OMC is consumed by the
expansion and it’s output is rerouted (or fed back)
into the AND array.
You can examine the fitter report generated by
PSDsoft Express to see resulting product term al-
location and product term expansion.
Figure 17. CPLD Output Macrocell
30/63
PT CLK
CLKIN
Allocator
PT
PT
Output Macrocell CS
PT
PT
MASK
REG.
POLARITY
RD
WR
Feedback ( .FB )
SELECT
Port Input
CLEAR ( .RE )
ENABLE ( .OE )
PRESET ( .PR )
MUX
TM
as needed.
IN
LD
DIN
CLR
Programmable
FF ( D / T/JK /SR )
PR
Q
Loading and Reading the Output Macrocells
(OMCs). Each of the two OMC blocks (8 OMCs
each) occupies a memory location in the DSP ad-
dress space, as defined in the csiop block
MCELLAB0-7 and MCELLBC0-7 (see Table 4).
The flip-flops in each of the 16 OMCs can be load-
ed from the data bus by a DSP. Loading the OMCs
with data from the DSP takes priority over internal
functions. As such, the preset, clear, and clock in-
puts to the flip-flop can be overridden by the DSP.
The ability to load the flip-flops and read them
back is useful in such applications as loadable
counters and shift registers, mailboxes, and hand-
shaking protocols.
Data is loaded into the Output Macrocells (OMC)
on the trailing edge of Write Strobe (WR, CNTL0).
COMB/REG
SELECT
MUX
INTERNAL DATA BUS
Macrocell
Allocator
Direction
Register
D [ 7:0 ]
Macrocell
Port
Driver
Input
AI04903B
I/O Pin