dsm2180f3 STMicroelectronics, dsm2180f3 Datasheet - Page 50

• Manufacturer Part Number: dsm2180f3
• Description: Dsm Digital Signal Processor System Memory For Analog Devices Adsp-218x Family 5v Supply
• Manufacturer: STMicroelectronics

DSM2180F3
Table 28. CPLD Macrocell Synchronous Clock Mode Timing
Note: 1. Fast Slew Rate output available on PB3-PB0, and PD2-PD0.
Table 29. CPLD Macrocell Asynchronous Clock Mode Timing
50/63
f
t
t
t
t
t
t
t
f
t
t
t
t
t
t
t
Symbol
Symbol
MAX
S
H
CH
CL
CO
ARD
MIN
MAXA
SA
HA
CHA
CLA
COA
ARDA
MINA
2. CLKIN (PD1) t
Maximum Frequency
External Feedback
Maximum Frequency
Internal Feedback
(f
Maximum Frequency
Pipelined Data
Input Setup Time
Input Hold Time
Clock High Time
Clock Low Time
Clock to Output Delay
CPLD Array Delay
Minimum Clock Period
Maximum Frequency
External Feedback
Maximum Frequency
Internal Feedback
(f
Maximum Frequency
Pipelined Data
Input Setup Time
Input Hold Time
Clock Input High Time
Clock Input Low Time
Clock to Output Delay
CPLD Array Delay
Minimum Clock Period
CNT
CNTA
)
)
Parameter
Parameter
CLCL
= t
CH
+ t
CL
2
.
1/(t
Any Macrocell
Any Macrocell
1/(t
1/(t
1/(t
Conditions
Conditions
Clock Input
Clock Input
Clock Input
1/(t
1/(t
SA
t
1/f
S
CHA
CH
SA
+t
+t
CH
S
CNTA
+t
CO
+t
+t
COA
+t
+t
CO
CL
COA
–10)
CL
CLA
–10)
)
)
)
)
Min
Min
15
10
10
20
12
12
12
28
0
8
-90
-90
30.30
43.48
50.00
26.32
35.71
41.67
Max
Max
18
16
30
16
Fast PT
Add 2
Add 2
Add 2
Add 2
Aloc
Aloc
PT
Add 10
Add 10
Add 10
Add 10
Add 10
Turbo
Turbo
Off
Off
Rate
Sub 2
Sub 2
Slew
Slew
Rate
1
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns