m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 117

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Figure 2.5.18. Set-up procedure of reception in serial interface special function slave mode, with clock delay (1)
Setting UARTi transmit/receive control register (i=0 to 3)
b7
b7
0 0
Setting UARTi special mode register 3 (i=0 to 3)
b7
Setting UARTi transmit/receive mode register (i=0 to 3)
0
page 108 of 354
Note 1: Set the RxDi pin's port direction register to “0” when receiving.
Note 2: Set the corresponding port direction register to “0”.
Note 1: Set the corresponding port direction register to “0”.
Note 2: UART2 transfer pin (TxD
1
1 0 0 1
0
1 1 1
It cannot be set to CMOS output.
b0
b0
b0
BRG count source select bit
CTS/RTS function select bit
(Valid when bit 4 = “0”)
Transmit register empty flag
CTS/RTS disable bit
Data output select bit (Note 2)
CLK polarity select bit
Transfer format select bit
b1 b0
0 0 : f
0 1 : f
1 0 : f
1 1 : Inhibited
0 : CTS function is selected (Note 1)
0 : Data present in transmit register
1 : No data present in transmit register
1 : CTS/RTS function disabled
0 : TxDi pin is CMOS output
1 : TxDi pin is N-channel open-drain output
0 : Transmission data is output at falling edge
0 : LSB first
UARTi special mode register 3
UiSMR3 [Address 03A5
UARTi transmit/receive mode register
UiMR [Address 03A8
SS port function enable bit
Clock phase set bit
Serial input port set bit
UARTi transmit/receive control register 0
UiC0 [Address 03AC
T
Must be fixed to “001” (Note 1)
Internal/external clock select bit
Invalid in clock synchronous I/O mode
Invalid in clock synchronous I/O mode
Invalid in clock synchronous I/O mode
(during transmission)
(transmission completed)
1 : External clock (Note 2)
1 : SS function enable
1 : With clock delay
1 : Select STxDi and SRxDi
of transfer clock and reception data is input
at rising edge
Usually set to “0”
X
D, R
1
8
32
(Slave mode)
is selected
is selected
Continued to the next page
is selected
X
D I/O polarity reverse bit
2
: P7
0
16
16
) is N-channel open drain output.
, 368
, 36C
16
, 365
16
16
, 0338
16
, 033C
, 0335
16
16
, 328
16
, 32C
, 325
16
16
]
16
]
]
2. Serial Interface Special Function