m58wr032ft STMicroelectronics, m58wr032ft Datasheet - Page 24

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m58wr032ft

Manufacturer Part Number
m58wr032ft
Description
32 Mbit 2mb X 16, Multiple Bank, Burst 1.8v Supply Flash Memory
Manufacturer
STMicroelectronics
Datasheet
M58WR032FT, M58WR032FB
or Erase operation. Indeterminate results can oc-
cur if V
When the V
age on the V
when the V
pin has a voltage that is below the V
Voltage, V
gram and Erase operations cannot be performed.
Once set High, the V
Low by a Clear Status Register command or a
hardware reset. If set High it should be reset be-
fore a new Program or Erase command is issued,
otherwise the new command will appear to fail.
Program Suspend Status Bit (SR2). The
gram Suspend Status bit indicates that a Program
operation has been suspended in the addressed
block. When the Program Suspend Status bit is
High (set to ‘1’), a Program/Erase Suspend com-
mand has been issued and the memory is waiting
for a Program/Erase Resume command. The Pro-
gram Suspend Status should only be considered
valid when the Program/Erase Controller Status
bit is High (Program/Erase Controller inactive).
SR2 is set within the Program Suspend Latency
time of the Program/Erase Suspend command be-
ing issued therefore the memory may still com-
plete the operation rather than entering the
Suspend mode.
When a Program/Erase Resume command is is-
sued the Program Suspend Status bit returns Low.
Block Protection Status Bit (SR1). The
Protection Status bit can be used to identify if a
Program or Block Erase operation has tried to
modify the contents of a locked block.
24/86
PP
becomes invalid during an operation.
PPLK
PP
PP
PP
Status bit is High (set to ‘1’), the V
Status bit is Low (set to ‘0’), the volt-
, the memory is protected and Pro-
pin was sampled at a valid voltage;
PP
Status bit can only be reset
PP
Lockout
Block
Pro-
PP
AND PSEUDO
ister.
When the Block Protection Status bit is High (set
to ‘1’), a Program or Erase operation has been at-
tempted on a locked block.
Once set High, the Block Protection Status bit can
only be reset Low by a Clear Status Register com-
mand or a hardware reset. If set High it should be
reset before a new command is issued, otherwise
the new command will appear to fail.
Bank Write/Multiple Word Program Status Bit
(SR0). The Bank Write Status bit indicates wheth-
er the addressed bank is programming or erasing.
In Enhanced Factory Program mode the Multiple
Word Program bit shows if a Word has finished
programming or verifying depending on the phase.
The Bank Write Status bit should only be consid-
ered valid when the Program/Erase Controller Sta-
tus SR7 is Low (set to ‘0’).
When both the Program/Erase Controller Status bit
and the Bank Write Status bit are Low (set to ‘0’),
the addressed bank is executing a Program or
Erase operation. When the Program/Erase Con-
troller Status bit is Low (set to ‘0’) and the Bank
Write Status bit is High (set to ‘1’), a Program or
Erase operation is being executed in a bank other
than the one being addressed.
In Enhanced Factory Program mode if Multiple
Word Program Status bit is Low (set to ‘0’), the de-
vice is ready for the next Word, if the Multiple Word
Program Status bit is High (set to ‘1’) the device is
not ready for the next Word.
Note: Refer to
CODES, for using the Status Reg-
APPENDIX C., FLOWCHARTS

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