hip1011b Intersil Corporation, hip1011b Datasheet - Page 6

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hip1011b

Manufacturer Part Number
hip1011b
Description
Pci Hot Plug Controller
Manufacturer
Intersil Corporation
Datasheet

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Typical Performance Curves
Adjusting the Fault Reporting and Power
Supply Latch-Off Delay Times
Figure 5 illustrates the relationship between the FLTN signal
and the gate drive outputs. Duration
between FLTN starting to transition from High to Low,
(indicating a fault has occurred) and the start of the gate
drive outputs latching off. The latch-off is initiated by the
falling FLTN signal reaching the output latch threshold
voltage, VFLTN, TH. For additional details and wave forms
see HIP1011A Data Sheet FN4631. Table 1 illustrates the
effect of the FLTN capacitor on the response times.
3V5VG Response
340
320
300
280
260
102
101
100
99
98
FIGURE 3. OCSET CURRENT vs TEMPERATURE
0
0
5 10 15 20 25 30 35 40 45 50 55 60 65 70
5
TABLE 1. RESPONSE TIME TABLE
FIGURE 1. r
10 15 20 25 30 35 40 45 50 55 60 65 70
a
NMOS -12 r
TEMPERATURE (
TEMPERATURE (
ON
PMOS +12 r
vs TEMPERATURE
ON
6
0.001µF
0.85µs
o
a
C)
, indicates the time
ON
o
C)
0.1µF
37µs
3.8ms
10µF
1000
900
800
700
600
HIP1011B
FIGURE 4. V
FIGURE 2. OC VTH vs TEMPERATURE (VR
105
9.5
9.4
9.3
9.2
9.1
95
85
75
65
0
0
5
5
10 15 20 25 30 35 40 45 50 55 60 65 70
10 15 20 25 30 35 40 45 50 55 60 65 70
CC
FIGURE 5. TIMING DIAGRAM
POWER ON RESET VTH vs TEMPERATURE
T1
TEMPERATURE (
TEMPERATURE (
3V OCVTH
a
T2
o
o
C)
C)
5V OCVTH
V
OCSET
FLTN,TH
3V5VG
November 18, 2004
FLTN
= 1.21V)
FN4640.5

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