x9522v20iz-bt1 Intersil Corporation, x9522v20iz-bt1 Datasheet
x9522v20iz-bt1
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x9522v20iz-bt1 Summary of contents
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Data Sheet Triple DCP, Dual Voltage Monitors FEATURES • Three Digitally Controlled Potentiometers (DCPs) —64 Tap - 10kΩ —100 Tap - 10kΩ —256 Tap - 100kΩ —Nonvolatile —Write Protect Function • 2-Wire industry standard Serial Interface • Dual Voltage ...
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... X9522V20I-B X9522VIB X9522V20IZ-A (Note) X9522VZIA X9522V20IZ-B (Note) X9522VZIB *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 ...
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PIN ASSIGNMENT Pin Name R 1 Connection to end of resistor array for (the 256 Tap) DCP Connection to terminal equivalent to the “Wiper” mechanical potentiometer for DCP Connection to ...
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SCL SDA PRINCIPLES OF OPERATION SERIAL INTERFACE Serial Interface Conventions The device supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The ...
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SCL SCL from from Master Master Data Output from Transmitter Data Output from Start Receiver Figure 3. DEVICE INTERNAL ADDRESSING Addressing Protocol Overview The user addressable internal components of the X9522 can be split up into two main parts: —Three ...
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Nonvolatile Write Acknowledge Polling After a nonvolatile write command sequence (for either the Non Volatile Memory of a DCP (NVM), or the CON- STAT Register) has been correctly issued (including the final STOP condition), the X9522 initiates an internal high ...
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Vcc t trans 0 The data in the WCR is then decoded to select and enable one of the respective FET switches. A “make before break” sequence is used internally for the FET switches when the wiper is moved from ...
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WRITE TYPE † WT Description Select a Volatile Write operation to be performed 0 on the DCP pointed to by bits P1 and P0 Select a Nonvolatile Write operation ...
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S t Signals from Slave a the Master Address r t SDA Bus Signals from the Slave It should be noted that all writes to any DCP of the X9522 are random in ...
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CS3 CS7 CS6 CS4 CS5 0 0 V2OS V3OS DWLK NV Bit(s) Description CS7 Always set to “0” (RESERVED) V2OS V2 Output Status flag V3OS V3 Output Status flag CS4 Always set to “0” (RESERVED) DWLK Sets the DCP Write ...
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SCL SDA SLAVE ADDRESS BYTE T Figure 12. CONSTAT Register Write Command Sequence CONSTAT Register Write Operation The CONSTAT register is accessed using the Slave Address set to 1010010 ...
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It should be noted that a write to nonvolatile bit (DWLK) of CONSTAT register will be ignored if the Write Protect pin of the X9522 is active (HIGH) (See "WP: Write Pro- tection Pin"). CONSTAT Register Read Operation The contents ...
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V2 SCL SDA † A0h Figure 15. Setting V V3 monitoring The X9522 asserts the V3RO output HIGH if the volt- age V3 exceeds the ...
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Setting a Higher V Voltage (x = 2,3) TRIPx To set a V threshold to a new voltage which is TRIPx higher than the present threshold, the user must apply the desired V threshold voltage to the corre- TRIPx sponding ...
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V TRIPx Desired V NO present value? V TRIPx Sequence Set Vx = desired V New Vx applied = Set Higher V + Old Vx applied | Error | Sequence Apply Vcc & Voltage > Desired V Decrease Vx NO ...
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ABSOLUTE MAXIMUM RATINGS Temperature under Bias Storage Temperature Voltage on WP pin (With respect to Vss) Voltage on other pins (With respect to Vss) | Voltage Voltage D.C. Output Current (SDA,V2RO,V3RO) Lead Temperature ...
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TIMING DIAGRAMS Figure 20. Bus Timing t F SCL t SU:DAT t SU:SA t HD:STA SDA IN SDA OUT Figure 21. WP Pin Timing START SCL SDA IN t SU:WP WP Figure 22. Write Cycle Timing SCL 8th bit of ...
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Figure 23. V2, V3 Timing Diagram RPDx VxRO Vcc / V1 Note : x = 2,3. Figure 24. V Programming Timing Diagram (x = 2,3) TRIPX V2 TSU VPS SCL ...
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Figure 25. DCP “Wiper Position” Timing Rwx (x = 0,1,2) R wx( tap position SCL SDA SLAVE ADDRESS BYTE T 19 X9522 ...
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D.C. OPERATING CHARACTERISTICS Symbol Parameter Current into Vcc / V1 Pin (1) I CC1 Read memory array Write nonvolatile memory Current into Vcc / V1 Pin (2) I CC2 With 2-Wire bus activity Input Leakage Current I LI Input Leakage ...
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A.C. CHARACTERISTICS (See Figure 20, Figure 21, Figure 22) Symbol f SCL Clock Frequency SCL (5) t Pulse width Suppression Time at inputs IN (5) t SCL LOW to SDA Data Out Valid AA (5) t Time the bus free ...
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POTENTIOMETER CHARACTERISTICS Symbol Parameter R End to End Resistance Tolerance TOL V R Terminal Voltage (x = 0,1,2) RHx Terminal Voltage (x = 0,1,2) RLx L P (1)(6 Power Rating ) R R DCP Wiper Resistance W ...
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1,2) PROGRAMMING PARAMETERS (See Figure 24) TRIPX Parameter t V Program Enable Voltage Setup time VPS TRIPx t V Program Enable Voltage Hold time VPH TRIPx t V Setup time TSU TRIPx t V Hold (stable) time ...
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APPENDIX 1 DCP1 (100 Tap) Tap position to Data Byte translation Table Tap Position Decimal ...
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APPENDIX 2 DCP1 (100 Tap) tap position to Data Byte translation algorithm example. (Example 1) unsigned DCP1_TAP_Position(int tap_pos) { int block; int i; int offset; int wcr_val; offset= 0; block = tap_pos / 25; if (block < 0) return ((unsigned)0); ...
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APPENDIX 2 DCP1 (100 Tap) tap position to Data Byte translation algorithm example. (Example 2) unsigned DCP100_TAP_Position(int tap_pos optional range checking */ if (tap_pos < 0) return ((unsigned)0); else if (tap_pos >99) return ((unsigned) 96); /* 100 Tap ...
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