uba20261 NXP Semiconductors, uba20261 Datasheet - Page 15

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uba20261

Manufacturer Part Number
uba20261
Description
600 V And 350 V Power Ic For Step Dimmable Cfls
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
UBA20261_UBA20262
Preliminary data sheet
7.4.2 Overcurrent protection
7.4.3 Overpower protection
7.4.4 Capacitive mode protection
switching cycle. The injected current is maintained until the end of the switching cycle.
This action immediately increases the half-bridge switching frequency. Additionally, for
each successive cycle that coil saturation is detected, capacitor C
ignition time-out detection in the ignition state.
CSP is triggered when the voltage on the SLS pin exceeds V
voltage V
sets the preheat current.
Using an internal reference source current and external resistor R
for the coil saturation threshold level V
mounted, the V
reasons to connect C
OCP is active in both the burn and boost states but not during boost transition.
Overcurrent is detected, when the peak voltage of the absolute value across the current
sense resistor connected to the SLS pin exceeds the OCP reference level V
current I
cycle.
If overcurrent is not present at the end of this cycle, the current is disabled. A current,
equal to I
number of cycles, a net discharging of the capacitor connected to the CP pin occurs.
When the voltage on the CP pin drops below V
During a continuous overcurrent condition, the overcurrent fault time of t
the V
OPP is active in the boost and burn state. The lamp current is limited and regulated in all
dim step states to the internal dim step reference voltage levels. These reference voltage
levels are derived from an internal reference voltage. Consequently, supply voltage
fluctuations in the mains supply voltage during overvoltage situations do not affect these
reference voltage levels.
When the lamp is in the first dim mode (no dimming), the current is limited and regulated
to the nominal lamp current. In addition, in the boost state, the first dim mode boosted by
a factor of 1.5.
CMP is active in the ignition, burn and boost states and during boost transition. The signal
across resistor R
When conditions are normal, the current flows from the LS transistor source to the
half-bridge when the LS transistor is switched on. This results in a negative voltage on the
SLS pin.
As the circuit yields to capacitive mode, the voltage becomes smaller and eventually
reverses polarity. CMP prevents this action by checking if the voltage on the SLS pin is
above the V
1
9
t
ph
th(sat)SLS
after which the IC enters Power-down mode. The V
o(CP)
o(CP)
i(SLS)
th(capm)SLS
is then sunk from the capacitor connected to the CP pin for the next full
level during the ignition state.
is sourced to the CP pin instead. If overcurrent occurs in more than half the
on the SLS pin is determined by the external resistor R
th(sat)SLS
All information provided in this document is subject to legal disclaimers.
SLS
also provides information about the half-bridge switching behavior.
LSAT
Rev. 1 — 9 September 2011
level.
level is internally clamped at 2.5 V. It is mandatory for stability
in parallel to R
600 V and 350 V power IC for step dimmable CFLs
th(sat)SLS
LSAT
even when R
th(CP)min
is possible. When resistor R
, the IC enters Power-down mode.
LSAT
th(ocp)SLS
th(sat)SLS
UBA20261/2
is not mounted.
LSAT
CI
discharges enabling
level is the same as
(typically 2.5 V). The
, an accurate setting
SLS
© NXP B.V. 2011. All rights reserved.
fault(oc)
value and also
LSAT
th(ocp)SLS
takes
is not
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. A

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