uba20261 NXP Semiconductors, uba20261 Datasheet - Page 16

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uba20261

Manufacturer Part Number
uba20261
Description
600 V And 350 V Power Ic For Step Dimmable Cfls
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
UBA20261_UBA20262
Preliminary data sheet
7.4.5 Overtemperature protection
7.4.6 Power-down mode
If the voltage across resistor R
transistor is switched on, the circuit assumes that it is in capacitive mode. When
capacitive mode is detected, the currents from the OTA, which normally regulate the lamp
current, are disabled. Then the capacitive mode sink current I
The capacitive mode sink current starts to discharge the capacitor/resistor circuitry on
the CI pin and as a result, gradually increases the half-bridge frequency. Discharging
continues for the remainder of the current switching cycle ensuring the total current on the
CI pin is equal to the sink current. If capacitive mode persists, the action is repeated until
capacitive mode is no longer detected. If capacitive mode is no longer detected, the OTA
takes over the regulation again.
If the conditions causing capacitive mode persist, OTA regulates the system back towards
capacitive mode and the protection takes over again. The system operates on the edge of
capacitive mode.
When in the boost and burn states, the half-bridge load is capacitive at higher
frequencies, CMP eventually drives the half-bridge to the maximum frequency f
This causes the IC to enter Power-down mode.
The OTP circuit is designed to prevent the device from overheating in hazardous
environments. The circuit is triggered when the temperature exceeds the maximum
temperature value T
level. This condition remains until the temperature decreases by  20 C = T
this decrease in temperature, the lamp current level returns to the nominal level.
Power-down mode is entered when:
In Power-down mode, the oscillator is stopped, the HS transistor is non-conductive and
the LS transistor is conductive. The V
released from Power-down mode by lowering the low voltage supply below V
switch reset).
An option is available which enables the IC to enter Power-down mode using external
logic. The external power-down option is only available when the IC is in the boost or burn
state. The CP pin is used to enable the external power-down option. When the CP pin is
connected using a 10 k resistor to the PGND pin or the SGND pin, V
V
Remark: Do not connect the CP pin directly to pins PGND or SGND. Always connect in
series to pins PGND or SGND with a 10 k resistor. This action avoids the IC being not
starting up because of excessive currents flowing during the reset and start-up states.
th(pd)CP
The overcurrent time exceeds the maximum overcurrent fault time t
overcurrent occurs in more than half the number of cycles when V
If during boost or burn state, f
two consecutive failed lamp ignition attempts
. The IC then enters Power-down mode.
All information provided in this document is subject to legal disclaimers.
j(otp)
Rev. 1 — 9 September 2011
. OTP changes the lamp current to the level equal to the V
SLS
bridge(max)
is above the V
600 V and 350 V power IC for step dimmable CFLs
DD
supply is internally clamped. The circuit is
is reached due to capacitive mode detection
th(capm)SLS
threshold when the LS
o(CI)
UBA20261/2
is enabled.
th(CP)min
CP
© NXP B.V. 2011. All rights reserved.
fault(oc)
is pulled below
DD(rst)
j(otp)hys
or if the
is reached
bridge(max)
(mains
otp(CSI)
. After
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