hip4082 Intersil Corporation, hip4082 Datasheet
hip4082
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hip4082 Summary of contents
Page 1
... SOIC (N) and DIP packages. Specifically targeted for PWM motor control and UPS applications, bridge based designs are made simple and flexible with the HIP4082 H-bridge driver. With operation up to 80V, the device is best suited to applications of moderate power levels. Similar to the HIP4081, it has a flexible input protocol for driving every possible switch combination except those which would cause a shoot-through condition ...
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... HIP4082 ALI AHI GND Functional Block Diagram BHI 2 AHI 7 DIS 8 DETECTOR UNDERVOLTAGE ALI 4 DEL 5 BLI HIP4082 80V BHO BHS LOAD BLO ALO AHS AHO GND AHB 9 DRIVER LEVEL U/V 10 AHO SHIFT AHS 11 TURN-ON DELAY DRIVER TURN-ON 13 ALO BLO DELAY ...
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... Typical Application (PWM Mode Switching) 1 12V 2 3 PWM 4 INPUT 5 DELAY RESISTOR 6 7 DIS 8 GND FROM OPTIONAL OVERCURRENT LATCH R DIS TO OPTIONAL CURRENT CONTROLLER OR OVERCURRENT LATCH 3 HIP4082 BHB BHO 16 BHI BHS 15 BLI BLO 14 ALI ALO 13 12V DEL AHS 11 SS AHO AHI 10 ...
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... High Level Input Voltage Input Voltage Hysteresis Low Level Input Current High Level Input Current TURN-ON DELAY PIN DEL Dead Time 4 HIP4082 Thermal Information Thermal Resistance +0.3V SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DD DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... AHO & BHO) Refresh Pulse Width (ALO & BLO) ALI, BLI AHI, BHI NOTE: X signifies that input can be either a “1” or “0”. 5 HIP4082 = V = 12V 0V, R AHB BHB SS AHS BHS SYMBOL TEST CONDITIONS 50mA OL OUT ...
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... BHS B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 16 BHO B High-side Output. Connect to gate of B High-side power MOSFET. 6 HIP4082 HIP4082 DESCRIPTION to set timing current that defines the dead time between drivers ...
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... XHO T HPLH DIS=0 and UV XLI XHI = HI OR NOT CONNECTED XLO XHO T DLPLH T DIS or UV REF-PW XLI XHI XLO XHO T DHPLH 7 HIP4082 HIP4082 T HPHL T LPLH (10% - 90%) FIGURE 1. INDEPENDENT MODE FIGURE 2. BISTATE MODE T DIS FIGURE 3. DISABLE FUNCTION (10% - 90%) January 3, 2006 FN3676.4 ...
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... FREQUENCY (kHz) FIGURE 6. FLOATING (IXHB) BIAS CURRENT vs FREQUENCY AND LOAD 1.2 1.1 1 0.9 0.8 -75 -50 - JUNCTION TEMPERATURE (°C) FIGURE 8. GATE CURRENT vs TEMPERATURE, NORMALIZED TO 25°C 8 HIP4082 -60 80 100 120 140 FIGURE 5. V 1.925 I (BIAS SRC ...
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... JUNCTION TEMPERATURE (°C) FIGURE 12. UPPER LOWER TURN-ON PROPAGATION DELAY vs TEMPERATURE 2 1 SWITCHING FREQUENCY (kHz) FIGURE 14. FULL BRIDGE LEVEL-SHIFT CURRENT vs FREQUENCY (kHz) 9 HIP4082 8 7.5 7 6 FIGURE 11. UNDERVOLTAGE TRIP VOLTAGES vs 10 1000 ON 100 LOWER t OFF 10 80 100 ...
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... 1000 DD 100 DEAD TIME RESISTANCE (kΩ) FIGURE 16. DEAD-TIME vs DEL RESISTANCE AND BIAS SUPPLY (V ) VOLTAGE DD 10 HIP4082 15V 12V 100 FIGURE 17. MAXIMUM OPERATING PEAK AHS/BHS 100 TEMPERATURE (°C) VOLTAGE vs TEMPERATURE ...
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... B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 11 HIP4082 E16.3 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE SYMBOL E A2 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 HIP4082 HIP4082 M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE M ...