hip6021 Intersil Corporation, hip6021 Datasheet

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hip6021

Manufacturer Part Number
hip6021
Description
Advanced Pwm And Triple Linear Power Controller
Manufacturer
Intersil Corporation
Datasheet

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Advanced PWM and Triple Linear Power
Controller
The HIP6021 provides the power control and protection for
four output voltages in high-performance, graphics intensive
microprocessor and computer applications. The IC integrates
a voltage-mode PWM controller and three linear controllers,
as well as the monitoring and protection functions into a 28-
pin SOIC package. The PWM controller regulates the
microprocessor core voltage with a synchronous-rectified
buck converter. The linear controllers regulate the computer
system’s AGP 1.5V or 3.3V bus power, the 1.5V GTL bus
power, and the 1.8V power for the North/South Bridge core
voltage and/or cache memory circuits. The HIP6021 includes
an Intel-compatible, TTL 5-input digital-to-analog converter
(DAC) that adjusts the core PWM output voltage from 1.3V
to 2.05V
0.1V increments. The precision reference and voltage-mode
control provide ±1% static regulation. The AGP bus power
linear controller’s output (V
TTL-compatible signal applied at the SELECT pin, for levels of
1.5V or 3.3V with ±3% accuracy. Based on the status of the
FIX pin, the other two linear regulators provide either fixed
output voltages of 1.5V±3% (V
or user-adjustable by means of an external resistor divider. All
linear controllers can employ either N-channel MOSFETs or
bipolar NPNs for the pass transistor.
The HIP6021 monitors all the output voltages. A single Power
Good signal is issued when the core is within ±10% of the
DAC setting and all other outputs are above their under-
voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controller’s over-current function monitors the output current
by using the voltage drop across the upper MOSFET’s
r
Ordering Information
Applications
• Motherboard Power Regulation for Computers
HIP6021CB
HIP6021CBZ (Note)
HIP6021EVAL1
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
DS(ON)
PART NUMBER
.
DC
in 0.05V steps and from 2.1V
Evaluation Board
RANGE (
TEMP.
0 to 70
0 to 70
OUT2
®
o
C)
OUT3
1
) is user-selectable, through a
28 Ld SOIC
28 Ld SOIC (Pb-free) M28.3
) and 1.8V±3% (V
Data Sheet
PACKAGE
DC
to 3.5V
DC
OUT4
M28.3
DWG. #
in
PKG.
DC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
),
1-888-INTERSIL or 321-724-7143
Features
• Provides 4 Regulated Voltages
• Drives N-Channel MOSFETs
• Linear Regulator Drives Compatible with both MOSFET
• Fixed or Externally Resistor-Adjustable Linear Outputs
• Simple Single-Loop Control Design
• Fast PWM Converter Transient Response
• Excellent Output Voltage Regulation
• TTL-Compatible 5-Bit DAC Microprocessor Core Output
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
• Small Converter Size
• Pb-Free Available (RoHS Compliant)
Pinout
- Microprocessor Core, AGP Bus, Memory, and GTL Bus
and Bipolar Series Pass Transistors
(FIX Pin)
- Voltage-Mode PWM Control
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
- Core PWM Output: ±1% Over Temperature
- Other Outputs: ±3% Over Temperature
Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.3V
- Switching Regulator Does Not Require Extra Current
- Constant Frequency Operation
- 200kHz Free-Running Oscillator; Programmable From
- Small External Component Count
Power
Sensing Element, Uses MOSFET’s r
50kHz to Over 1MHz
March 8, 2005
FAULT/RT
SELECT
PGOOD
DRIVE2
Copyright © Intersil Americas Inc. 1999, 2005. All Rights Reserved
VSEN2
VSEN4
VID4
VID3
VID2
VID1
VID0
FIX
SD
SS
|
Intersil (and design) is a trademark of Intersil Americas Inc.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
HIP6021 (SOIC)
TOP VIEW
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DS(ON)
VCC
UGATE
PHASE
LGATE
PGND
OCSET
VSEN1
FB
COMP
VSEN3
DRIVE3
GND
VAUX
DRIVE4
HIP6021
DC
FN4684.1
to 3.5V
DC

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hip6021 Summary of contents

Page 1

... N-channel MOSFETs or bipolar NPNs for the pass transistor. The HIP6021 monitors all the output voltages. A single Power Good signal is issued when the core is within ±10% of the DAC setting and all other outputs are above their under- voltage levels ...

Page 2

... Block Diagram 2 HIP6021 ...

Page 3

... TYPEDET Q4 V OUT3 1.5V C OUT3 Q5 V OUT4 1.8V C OUT4 3 HIP6021 LINEAR CONTROLLER Q3 HIP6021 LINEAR CONTROLLER VCC Q3 DRIVE2 VSEN2 OUT2 SELECT VAUX HIP6021 DRIVE3 VSEN3 FIX DRIVE4 VSEN4 GND Q1 PWM CONTROLLER Q2 LINEAR Q5 V CONTROLLER OUT4 OCSET POWERGOOD PGOOD UGATE Q1 L OUT1 PHASE LGATE ...

Page 4

... VSEN2 Regulation Voltage VSEN2 Regulation Voltage VSEN3 Regulation Voltage VSEN4 Regulation Voltage Under-Voltage Level (VSEN/VREG) Under-Voltage Hysteresis (VSEN/VREG) Output Drive Current (All Linears) 4 HIP6021 Thermal Information Thermal Resistance (Typical, Note 1) SOIC Package 0.3V CC Maximum Junction Temperature (Plastic Package 150 Maximum Storage Temperature Range . . . . . . . . . . -65 Maximum Lead Temperature (Soldering 10s) ...

Page 5

... PGOOD Voltage Low Typical Performance Curves 1000 R PULLUP T TO +12V 100 10 R PULLDOWN 100 SWITCHING FREQUENCY (kHz) FIGURE 1. R RESISTANCE vs FREQUENCY T 5 HIP6021 SYMBOL TEST CONDITIONS GBWP SR COMP = 10pF I VCC = 12V UGATE UGATE UGATE GATE-PHASE I VCC = 12V ...

Page 6

... This pin shuts down all the outputs. A TTL-compatible, logic level high signal applied at this pin immediately discharges 6 HIP6021 the soft-start capacitor, disabling all the outputs. Dedicated internal circuitry insures the core output voltage does not go negative during this process. When re-enabled, the IC undergoes a new soft-start cycle ...

Page 7

... Connect this pin to the output of the linear 1.8V regulator. This pin is monitored for undervoltage events. Description Operation The HIP6021 monitors and precisely controls 4 output voltage levels (Refer to Block and Simplified Power System Diagrams, and Typical Application Schematic designed for microprocessor computer applications with 3 ...

Page 8

... A window comparator monitors the SS pin and indicates when C 8 HIP6021 fully charged to 4V (UP signal). An under-voltage on either linear output (VSEN2, VSEN3, or VSEN4) is ignored until after the soft-start interval (T4 in Figure 3). This allows ...

Page 9

... OC + PHASE - PWM GATE CONTROL FIGURE 6. OVER-CURRENT DETECTION 9 HIP6021 The OC trip point varies with MOSFET’s r temperature variations. To avoid over-current tripping in the normal operating load range, determine the R resistor from the equation above with: 1. The maximum r COUNT = 3 2. The minimum I 3. Determine I ∆ ...

Page 10

... The peak surge current occurs during the initial output voltage rise to 70% of the set value. Shutdown The HIP6021 features a dedicated shutdown pin (SD). A TTL-compatible, logic high signal applied to this pin shuts down (disables) all four outputs and discharges the soft-start capacitor ...

Page 11

... Modulator Break Frequency Equations The compensation network consists of the error amplifier (internal to the HIP6021) and the impedance networks Z and Z a closed loop transfer function with high 0dB crossing frequency (f is the difference between the closed loop phase at f 180 degrees. The equations below relate the compensation network’ ...

Page 12

... REFERENCE ERROR AMP DETAILED COMPENSATION COMPONENTS COMP HIP6021 DACOUT FIGURE 9. VOLTAGE-MODE BUCK CONVERTER COMPENSATION DESIGN 12 HIP6021 Compensation Break Frequency Equations OCSET1 OCSET1 Figure 10 shows an asymptotic plot of the DC-DC Q1 converter’s gain vs. frequency. The actual Modulator Gain L OUT1 V OUT1 has a high gain peak dependent on the quality factor (Q) of the output filter, which is not shown in Figure 9 ...

Page 13

... Given a sufficiently fast control loop design, the 13 HIP6021 HIP6021 will provide either 0% or 100% duty cycle in response to a load transient. The response time is the time interval required to slew the inductor current from an initial current value to the post-transient current level. During this ...

Page 14

... The equations below assume linear voltage-current transitions and do not model power loss due to the reverse- recovery of the lower MOSFET’s body diode. The gate- charge losses are dissipated by the HIP6021 and don't heat the MOSFETs. However, large gate-charge increases the switching time, t ...

Page 15

... HIP6021 DC-DC Converter Application Circuit Figure 12 shows an application circuit of a power supply for a microprocessor computer system. The power supply provides the microprocessor core voltage (VOUT1), the AGP bus voltage (VOUT2), the GTL bus voltage (VOUT3), and the memory +12V IN L1 +5V IN 1µH GND +3 ...

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