hip6303cbz-t Intersil Corporation, hip6303cbz-t Datasheet - Page 10

• Manufacturer Part Number: hip6303cbz-t
• Description: Microprocessor Core Voltage Regulator Multiphase Buck Pwm Controller
• Manufacturer: Intersil Corporation

MOSFETS to conduct and shunt the CORE voltage to
ground to protect the load.
If after this event, the CORE voltage falls below the over-
voltage limit (plus some hysteresis), the PWM outputs will
three state. The HIP6601 family drivers pass the three state
information along, and shuts off both upper and lower
MOSFETs. This prevents “dumping” of the output capacitors
back through the lower MOSFETs, avoiding a possibly
destructive ringing of the capacitors and output inductors. If
the conditions that caused the over-voltage persist, the
PWM outputs will be cycled between three state and V
clamped to ground, as a hysteretic shunt regulator.
Under-Voltage
The VSEN pin also detects when the CORE voltage falls
more than 10% below the VID programmed level. This
causes PGOOD to go low, but has no other effect on
operation and is not latched. There is also hysteresis in this
detection point.
Over-Current
In the event of and over-current condition, the over-current
protection circuit reduces the average current delivered to
less than 25% of the current limit. When an over-current
condition is detected, the controller forces all PWM outputs
into a three state mode. This condition results in the gate
driver removing drive to the output stages.The HIP6303
goes into a wait delay timing cycle that is equal to the Soft-
Start ramp time. PGOOD also goes “low” during this time
due to VSEN going below its threshold voltage.To lower the
average output dissipation, the Soft-Start initial wait time is
increased from 32 to 2048 cycles, then the Soft-Start ramp is
initiated. At a PWM frequency of 200kHz, for instance, an
over-current detection would cause a dead time of 10.24ms,
then a ramp of 10.08ms.
At the end of the delay, PWM outputs are restarted and the
Soft-Start ramp is initiated. If a short is present at that time,
the cycle is repeated. This is the hiccup mode.
Figure 6 shows the supply shorted under operation and the
hiccup operating mode described above. Note that due to
the high short circuit current, over-current is detected before
completion of the start-up sequence so the delay is not quite
as long as the normal Soft-Start cycle.
10
CORE
HIP6303
CORE Voltage Programming
The voltage identification pins (VID0, VID1, VID2, and VID3)
set the CORE output voltage. Each VID pin is pulled to V
by an internal 20 A current source and accepts open-
collector/open-drain/open-switch-to-ground or standard low-
voltage TTL or CMOS signals.
Table 1 shows the nominal DAC voltage as a function of the
VID codes. The power supply system is 1% accurate over
the operating temperature and voltage range.
FIGURE 6. SHORT APPLIED TO SUPPLY AFTER POWER-UP
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
SHORT APPLIED HERE
HICCUP MODE. SUPPLY POWERED BY ATX SUPPLY
TABLE 1. VOLTAGE IDENTIFICATION CODES
ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN”
CORE LOAD CURRENT = 31A, 5V LOAD = 5A
SUPPLY FREQUENCY = 200kHz, V
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
IN
= 12V
VDAC
PGOOD
SHORT
CURRENT
50A/Div
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
CC