se97pw/1 NXP Semiconductors, se97pw/1 Datasheet - Page 27

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se97pw/1

Manufacturer Part Number
se97pw/1
Description
Se97 Memory Module Temp Sensor With Integrated Spd
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
SE97_2
Product data sheet
8.8 Device ID register
8.9 SMBus register
The SE97 device ID and device revision are A1h and 00h, respectively.
Table 23.
Table 24.
Table 25.
Bit
Symbol
Default
Access
Bit
Symbol
Default
Access
Bit
15:8
7
6:1
0
Bit
Symbol
Default
Access
Bit
Symbol
Default
Access
Symbol
RFU
STMOUT
RFU
SALRT
Device ID register bit allocation
SMBus Timeout register bit allocation
SMBus Timeout register bit description
STMOUT
15
R/W
R
1
R
7
0
15
R
0
7
0
Description
reserved; always ‘0’
SMBus time-out.
When either of the lock bits is set, this bit cannot be altered until unlocked.
reserved; always ‘0’
SMBus Alert Response Address (ARA).
When either of the lock bits is set, this bit cannot be altered until unlocked.
Rev. 02 — 12 October 2007
14
R
0 — SMBus time-out is enabled (default)
1 — disable SMBus time-out
0 — SMBus ARA is enabled (default)
1 — disable SMBus ARA
0
R
6
0
14
R
0
R
6
0
13
R
1
R
5
0
13
R
0
R
5
0
Memory module temp sensor with integrated SPD
Device revision
12
R
0
R
4
0
12
R
0
Device ID
R
4
0
RFU
RFU
11
R
0
R
3
0
11
R
0
R
3
0
10
R
10
0
R
2
0
R
0
R
2
0
© NXP B.V. 2007. All rights reserved.
R
9
1
R
R
1
0
9
0
R
1
0
SE97
SALRT
R/W
27 of 43
R
8
0
R
R
8
0
0
0
0
0

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