74ALVC16374DTR ON Semiconductor, 74ALVC16374DTR Datasheet

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74ALVC16374DTR

Manufacturer Part Number
74ALVC16374DTR
Description
IC FLIP-FLOP 16BIT DTYPE 48TSSOP
Manufacturer
ON Semiconductor
Series
74ALVCr
Type
D-Type Busr
Datasheet

Specifications of 74ALVC16374DTR

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
8
Frequency - Clock
250MHz
Delay Time - Propagation
1.1ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
74ALVC16374DTROS
74ALVC16374
Low−Voltage 1.8/2.5/3.3 V
16−Bit D−Type Flip−Flop
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
16−bit D−type flip−flop. It is designed for very high−speed, very
low−power operation in 1.8 V, 2.5 V or 3.3 V systems. The
ALVC16374 is byte controlled, with each byte functioning identically,
but independently. Each byte has separate Output Enable and Clock
Pulse inputs. These control pins can be tied together for a full 16−bit
operation.
individual D−type inputs and 3.6 V−tolerant 3−state outputs. The
clocks (CPn) and Output Enables (OEn) are common to all flip−flops
within the respective byte. The flip−flops will store the state of
individual D inputs that meet the setup and hold time requirements on
the LOW−to−HIGH Clock (CP) transition. With the OE LOW, the
contents of the flip−flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. The OE input level
does not affect the operation of the flip−flops.
†To ensure the outputs activate in the 3−state condition, the output enable pins
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 1
should be connected to V
determined by the current sinking capability of the output connected to the OE pin.
The 74ALVC16374 is an advanced performance, non−inverting
The 74ALVC16374 consists of 16 edge−triggered flip−flops with
Substantially Reduces System Power Requirements
>200 V
Designed for Low Voltage Operation: V
3.6 V Tolerant Inputs and Outputs
High Speed Operation: 3.6 ns max for 3.0 to 3.6 V
Static Drive: ±24 mA Drive at 3.0 V
Supports Live Insertion and Withdrawal
I
Near Zero Static Supply Current in All Three Logic States (40 mA)
Latchup Performance Exceeds ±250 mA @ 125°C
ESD Performance: Human Body Model >2000 V; Machine Model
Second Source to Industry Standard 74ALVC16374
OFF
Specification Guarantees High Impedance When V
±12 mA Drive at 2.3 V
±4 mA Drive at 1.65 V
CC
through a pull−up resistor. The value of the resistor is
4.5 ns max for 2.3 to 2.7 V
7.8 ns max for 1.65 to 1.95 V
CC
= 1.65−3.6 V
CC
1
= 0 V
48
PIN NAMES
74ALVC16374DTR
Pins
OEn
CPn
D0−D15
O0−O15
CASE 1201
DT SUFFIX
TSSOP−48
Device
1
ORDERING INFORMATION
A
Location
WL
YY
WW
http://onsemi.com
Function
Output Enable Inputs
Clock Pulse Inputs
Inputs
Outputs
Package
TSSOP
= Assembly
= Wafer Lot
= Year
= Work Week
48
1
Publication Order Number:
MARKING DIAGRAM
74ALVC16374DT
AWLYYWW
2500/Tape & Reel
74ALVC16374/D
Shipping

Related parts for 74ALVC16374DTR

74ALVC16374DTR Summary of contents

Page 1

... OE pin. © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev SUFFIX CASE 1201 = 1.65−3 PIN NAMES Pins OEn CPn D0−D15 O0−O15 † 74ALVC16374DTR 1 http://onsemi.com MARKING DIAGRAM 48 74ALVC16374DT 1 AWLYYWW TSSOP− Assembly Location WL = Wafer Lot YY = Year ...

Page 2

OE1 CP1 GND GND ...

Page 3

MAXIMUM RATINGS (Note 1) Symbol V DC Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Sink/Source Current ...

Page 4

DC ELECTRICAL CHARACTERISTICS Symbol Characteristic V HIGH Level Input Voltage (Note LOW Level Input Voltage (Note HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3−State ...

Page 5

AC CHARACTERISTICS (Note 10 Symbol Parameter f Clock Pulse Frequency max t Propagation Delay PLH PHL t Output Enable Time to PZH t High and Low Level PZL t Output Disable Time From PHZ ...

Page 6

CPn Vm f max PLH PHL On Vm WAVEFORM 1 − PROPAGATION DELAYS, SETUP AND HOLD TIMES 2.0ns, 10 1MHz ...

Page 7

PULSE GENERATOR R T TEST PLH PHL PZL PLZ PZH PHZ equivalent (Includes jig and probe capacitance 500 W or equivalent L R ...

Page 8

SEE NOTE 2 FOR MACHINE REFERENCE ONLY INCLUDING DRAFT AND RADII CONCENTRIC AROUND B R MIN. TAPE AND COMPONENTS SHALL PASS AROUND RADIUS R" WITHOUT DAMAGE BENDING RADIUS MAXIMUM COMPONENT ROTATION 10° TYPICAL COMPONENT CAVITY ...

Page 9

MIN (0.06") 20.2 mm MIN A (0.795") FULL RADIUS Figure 8. Reel Dimensions REEL DIMENSIONS Tape Size A Max 24 mm 360 mm 24 2.0 mm, −0.0 (14.173") (0.961" + 0.078", −0.00) DIRECTION OF FEED BARCODE ...

Page 10

TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS CAVITY TOP TAPE 160 mm MIN TAPE K É É É É É É É É É É É É É É L É É É É É É É É É ...

Page 11

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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