c8051t602 Silicon Laboratories, c8051t602 Datasheet - Page 61

• Manufacturer Part Number: c8051t602
• Description: Mixed Signal Otp Eprom Mcu Family
• Manufacturer: Silicon Laboratories

9.2.
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The CIP-51 memory organization is
shown in Figure 9.2 and Figure 9.3.
9.2.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051T600/1 implements 8192 bytes of this
program memory space as in-system, OTP EPROM, organized in a contiguous block from addresses
0x0000 to 0x1FFF. Note: 512 bytes (0x1E00 – 0x1FFF) of this memory are reserved for factory use and
are not available for user program storage. The C8051T602/3 implements 4096 bytes of OTP EPROM pro-
gram memory space; the C8051T604/5 implements 2048 bytes of OTP EPROM program memory space.
Figure 9.2 shows the program memory maps for C8051T600/1/2/3/4/5 devices.
Program memory is read-only from within firmware. Individual program memory bytes can be read using
the MOVC instruction. This facilitates the use of OTP EPROM space for constant storage.
Memory Organization
C8051T600/1
Security Byte
OTP Memory
7680 Bytes
Reserved
0x1FFF
0x1FFE
0x1E00
0x1DFF
0x0000
Figure 9.2. Program Memory Maps
C8051T602/3
Security Byte
OTP Memory
4096 Bytes
Reserved
Rev. 0.5
0x1FFF
0x1FFE
0x1000
0x0FFF
0x0000
C8051T600/1/2/3/4/5
C8051T604/5
Security Byte
OTP Memory
2048 Bytes
Reserved
0x1FFF
0x1FFE
0x0800
0x07FF
0x0000
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