mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 130

no-image

mc9s12e256

Manufacturer Part Number
mc9s12e256
Description
Hcs12 Microcontrollers 16-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc9s12e256CFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12e256CPVE
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
mc9s12e256CPVE
Manufacturer:
FREESCA
Quantity:
300
Part Number:
mc9s12e256CPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12e256MFUE
Manufacturer:
FREESCAL
Quantity:
329
Part Number:
mc9s12e256MFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12e256MPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12e256VFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 3 Port Integration Module (PIM9E256V1)
3.3.1
Port AD is associated with the analog-to-digital converter (ATD) and keyboard wake-up (KWU)
interrupts. Each pin is assigned to these modules according to the following priority: ATD > KWU >
general-purpose I/O.
For the pins of port AD to be used as inputs, the corresponding bits of the ATDDIEN0 and ATDDIEN1
registers in the ATD module must be set to 1 (digital input buffer is enabled). The ATDDIEN0 and
ATDDIEN1 registers do not affect the port AD pins when they are configured as outputs.
Refer to
and ATDDIEN1 registers.
During reset, port AD pins are configured as high-impedance analog inputs (digital input buffer is
disabled).
3.3.1.1
Read: Anytime. Write: Anytime.
If the data direction bit of the associated I/O pin (DDRADx) is set to 1 (output), a write to the
corresponding I/O Register bit sets the value to be driven to the Port AD pin. If the data direction bit of the
associated I/O pin (DDRADx) is set to 0 (input), a write to the corresponding I/O Register bit takes place
but has no effect on the Port AD pin.
If the associated data direction bit (DDRADx) is set to 1 (output), a read returns the value of the I/O register
bit.
If the associated data direction bit (DDRADx) is set to 0 (input) and the associated ATDDIEN0(1) bit is
set to 0 (digital input buffer is disabled), the associated I/O register bit (PTADx) reads “1”.
If the associated data direction bit (DDRADx) is set to 0 (input) and the associated ATDDIEN0(1) bit is
set to 1 (digital input buffer is enabled), a read returns the value of the pin.
130
KWU:
Reset
KWU:
Reset
ATD:
ATD:
W
W
R
R
Chapter 6, “Analog-to-Digital Converter (ATD10B16CV4)”
KWAD15
PTAD15
KWAD7
PTAD7
Port AD
AN15
AN7
Port AD I/O Register (PTAD)
0
0
7
7
KWAD14
PTAD14
KWAD6
PTAD6
AN14
AN6
0
0
6
6
Figure 3-2. Port AD I/O Register (PTAD)
KWAD13
PTAD13
KWAD5
PTAD5
AN13
AN5
MC9S12E256 Data Sheet, Rev. 1.08
0
0
5
5
PTAD12
KWAD4
KWA12
PTAD4
AN12
AN4
0
0
4
4
KWAD11
PTAD11
KWAD3
PTAD3
AN11
AN3
3
0
3
0
for information on the ATDDIEN0
KWAD10
PTAD10
KWAD2
PTAD2
AN10
AN2
0
0
2
2
KWAD9
KWAD1
PTAD9
PTAD1
Freescale Semiconductor
AN9
AN1
1
0
1
0
KWAD8
KWAD0
PTAD8
PTAD0
AN8
AN0
0
0
0
0

Related parts for mc9s12e256