mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 545

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mc9s12e256

Manufacturer Part Number
mc9s12e256
Description
Hcs12 Microcontrollers 16-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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19.3.2.1
Read: Anytime
Write: Once in normal and emulation modes, anytime in special modes
This register initializes the position of the internal RAM within the on-chip system memory map.
19.3.2.2
Read: Anytime
Write: Once in normal and emulation modes and anytime in special modes
This register initializes the position of the internal registers within the on-chip system memory map. The
registers occupy either a 1K byte or 2K byte space and can be mapped to any 2K byte space within the first
32K bytes of the system’s address space.
Freescale Semiconductor
RAM[15:11]
REG[14:11]
RAMHAL
Reset
Reset
Field
Field
7:3
6:3
0
W
W
R
R
RAM15
Internal RAM Map Position — These bits determine the upper five bits of the base address for the system’s
internal RAM array.
RAM High-Align — RAMHAL specifies the alignment of the internal RAM array.
0 Aligns the RAM to the lowest address (0x0000) of the mappable space
1 Aligns the RAM to the higher address (0xFFFF) of the mappable space
Internal Register Map Position — These four bits in combination with the leading zero supplied by bit 7 of
INITRG determine the upper five bits of the base address for the system’s internal registers (i.e., the minimum
base address is 0x0000 and the maximum is 0x7FFF).
Initialization of Internal RAM Position Register (INITRM)
Initialization of Internal Registers Position Register (INITRG)
0
0
0
7
7
Writes to this register take one cycle to go into effect.
Figure 19-4. Initialization of Internal Registers Position Register (INITRG)
Figure 19-3. Initialization of Internal RAM Position Register (INITRM)
= Unimplemented or Reserved
= Unimplemented or Reserved
RAM14
REG14
0
0
6
6
Table 19-2. INITRM Field Descriptions
Table 19-3. INITRG Field Descriptions
RAM13
REG13
MC9S12E256 Data Sheet, Rev. 1.08
0
0
5
5
RAM12
REG12
NOTE
0
0
4
4
Description
Description
RAM11
REG11
3
1
3
0
Chapter 19 Module Mapping Control (MMCV4)
0
0
0
0
2
2
0
0
0
0
1
1
RAMHAL
1
0
0
0
0
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