mc908jl16 Freescale Semiconductor, Inc, mc908jl16 Datasheet - Page 109

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mc908jl16

Manufacturer Part Number
mc908jl16
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 8
Multi-Master IIC Interface (MMIIC)
8.1 Introduction
The Multi-master IIC (MMIIC) Interface is designed for internal serial communication between the MCU
and other IIC devices. A hardware circuit generates “start” and “stop” signal, while byte by byte data
transfer is interrupt driven by the software algorithm. Therefore, it can greatly help the software in dealing
with other devices to have higher system efficiency in a typical digital monitor system.
The MMIIC not only can be applied in internal communications, but can also be used as a typical
command reception serial bus for factory setup and alignment purposes. It also provides the flexibility of
hooking additional devices to an existing system for future expansion without adding extra hardware.
This Multi-master IIC module uses the SCL clock line and the SDA data line to communicate with external
DDC host or IIC interface. These two pins are user selectable using the CONFIG2 register (see
Figure 3-3. Configuration Register 2
their application needs.
The maximum data rate typically is 400k-bps. The maximum communication length and the number of
devices that can be connected are limited by a maximum bus capacitance of 400pF.
8.2 Features
Freescale Semiconductor
Compatibility with multi-master IIC bus standard
Software controllable acknowledge bit generation
Interrupt driven byte by byte data transfer
Calling address identification interrupt
Auto detection of R/W bit and switching of transmit or receive mode
Detection of START, repeated START, and STOP signals
Auto generation of START and STOP condition in master mode
Arbitration loss detection and No-ACK awareness in master mode
8 selectable baud rate master clocks
Automatic recognition of the received acknowledge bit
The outputs of SCL and SDA pins are open-drain type, these pins contain
ESD clamping diodes to V
V
DD
+ 0.3 V.
MC68HC908JL16 Data Sheet, Rev. 1.1
(CONFIG2)) to share either PTA2/PTA3 or PTD6/PTD7 based on
DD
and therefore cannot be driven to higher than
NOTE
109

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