cop8tab5 National Semiconductor Corporation, cop8tab5 Datasheet - Page 45

• Manufacturer Part Number: cop8tab5
• Description: 8-bit Cmos Rom Microcontroller With 2k Or 4k Memory
• Manufacturer: National Semiconductor Corporation

18.0 Instruction Set
18.7 INSTRUCTION EXECUTION TIME
Most instructions are single byte (with immediate addressing
mode instructions taking two bytes).
Most single byte instructions take one cycle time to execute.
Skipped instructions require x number of cycles to be
skipped, where x equals the number of bytes in the skipped
instruction opcode.
See the BYTES and CYCLES per INSTRUCTION table for
details.
Bytes and Cycles per Instruction
The following table shows the number of bytes and cycles for
each instruction in the format of byte/cycle.
Arithmetic and Logic Instructions
ADD
ADC
SUBC
AND
OR
XOR
IFEQ
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
JSRL
JSR
JID
RET
RETSK
RETI
INTR
NOP
Addr.
Addr.
RPND
[B]
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
Jump SubRoutine Long
Jump SubRoutine
Jump InDirect
RETurn from subroutine
RETurn and SKip
RETurn from Interrupt
Generate an Interrupt
No OPeration
Direct
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
1/3
3/4
3/4
3/4
(Continued)
1/1
Immed.
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
45
Instructions Using A & C
Transfer of Control Instructions
[SP] ← PL, [SP−1] ← PU,SP−2, PC ← ii
[SP] ← PL, [SP−1] ← PU,SP−2, PC9…0 ← i
PL ← ROM (PU,A)
SP + 2, PL ← [SP], PU ← [SP−1]
SP + 2, PL ← [SP],PU ← [SP−1],
skip next instruction
SP + 2, PL ← [SP],PU ← [SP−1],GIE ← 1
[SP] ← PL, [SP−1] ← PU, SP−2, PC ← 0FF
PC ← PC + 1
CLRA
INCA
DECA
LAID
DCORA
RRCA
RLCA
SWAPA
SC
RC
IFC
IFNC
PUSHA
POPA
ANDSZ
JMPL
JMP
JP
JSRL
JSR
JID
VIS
RET
RETSK
RETI
INTR
NOP
1/1
1/1
1/1
1/3
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/3
1/3
2/2
3/4
2/3
1/3
3/5
2/5
1/3
1/5
1/5
1/5
1/5
1/7
1/1
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