ha5352 Intersil Corporation, ha5352 Datasheet

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ha5352

Manufacturer Part Number
ha5352
Description
Fast Acquisition Dual Sample And Hold Amplifier
Manufacturer
Intersil Corporation
Datasheet
May 1997
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Features
• Fast Acquisition to 0.01% . . . . . . . . . . . . . . . 70ns (Max)
• Low Offset Error r2mV (Max)
• Low Pedestal Error r10mV (Max)
• Low Droop Rate . . . . . . . . . . . . . . . . . . . . . 2PV/Ps (Max)
• Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . 40MHz
• Low Power Dissipation per Amp . . . . . . .220mW (Max)
• Total Harmonic Distortion (Hold Mode) . . . . . . . -72dBc
• Fully Differential Inputs
• On Chip Hold Capacitor
Applications
• Synchronous Sampling
• Wide Bandwidth A/D Conversion
• Deglitching
• Peak Detection
• High Speed DC Restore
Pinouts
GND1
GND2
+IN2
-IN2
+IN
V1-
NC
-IN
HA5352 (300 mil SOIC)
1
2
3
4
5
6
7
8
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
®
TOP VIEW
S/H1
S/H2
16
15
14
13
12
11
10
9
(V
V1+
S/H1 CONTROL
NC
OUT1
V2-
OUT2
S/H2 CONTROL
V2+
IN
= 5V
P-P
at 1MHz)
3-1
Description
The HA5352 is a fast acquisition, wide bandwidth Dual Sam-
ple and Hold amplifier built with the Intersil HBC-10 BiCMOS
process. This Sample and Hold amplifier offers the combina-
tion of features; fast acquisition time (70ns to 0.01%), excel-
lent DC precision and extremely low power dissipation,
making it ideal for use in multi-channel systems that require
low power.
The HA5352 comes in an open loop configuration with fully
differential inputs providing flexibility for user defined feed-
back. In unity gain the HA5352 is completely self-contained
and requires no external components. The on-chip 15pF
hold capacitors are completely isolated to minimize droop
rate and reduce the sensitivity of pedestal error. The
HA5352 Dual Sample and Hold is available in a 14 lead
PDIP and 16 lead SOIC packages saving board space while
its pinout is designed to simplify layout.
Ordering Information
HA5352IP
HA5352IB
NUMBER
PART
Dual Sample and Hold Amplifier
GND1
GND2
+IN1
+IN2
TEMPERATURE
-IN1
-IN2
-40
-40
V1-
o
o
RANGE
C to +85
C to +85
1
2
3
4
5
6
7
HA5352 (PDIP)
HA5352
TOP VIEW
o
o
C
C
14 Lead Plastic DIP
16 Lead Plastic SOIC (W)
Fast Acquisition
14
13
12
11
10
9
8
File Number
V1+
S/H1 CONTROL
OUT1
V2-
OUT2
S/H2 CONTROL
V2+
PACKAGE
3394.5

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ha5352 Summary of contents

Page 1

... The on-chip 15pF IN P-P hold capacitors are completely isolated to minimize droop rate and reduce the sensitivity of pedestal error. The HA5352 Dual Sample and Hold is available lead PDIP and 16 lead SOIC packages saving board space while its pinout is designed to simplify layout. Ordering Information PART ...

Page 2

... V IH Input Voltage (Low Specifications HA5352 Operating Conditions Operating Temperature Range HA5352I -40 Storage Temperature Range . . . . . . . . . . . . . -65 Thermal Package Characteristics o C Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . o C SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

... Signal to Noise Ratio V = 4.5V IN (RMS Signal to RMS Noise) SAMPLE AND HOLD CHARACTERISTICS Acquisition Time 0V to 2.0V Step to r1mV 0V to 2.0V Step to 0.01% (r200PV) -2.5V to +2.5V Step to 0.01% (r500PV) Specifications HA5352 = r5V Internal = 15pF, Digital Input: V SUPPLY H TEMP Full Full Full -40 ...

Page 4

... Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func- tional operation under any of these conditions is not necessarily implied. 2. Derived from Computer Simulation only, not tested. 3. +CMRR is measured from 0V to +2.5V, -CMRR is measured from 0V to -2.5V. Specifications HA5352 = r5V Internal = 15pF, Digital Input: V SUPPLY ...

Page 5

... Type: Sandwich Passivation Å Nitride - 4k , Undoped Si Glass(USG SUBSTRATE POTENTIAL: V- TRANSISTOR COUNT: 312 Metallization Mask Layout -IN1 +IN1 V1- V1- V1- +IN2 -IN2 HA5352 Å Å r Å , Total - 12k 2k HA5352 GND1 GND1 V1+ V1+ V1+ GND2 GND2 V2+ V2+ V2+ 3-5 S/H CONTROL1 V 1 OUT V 1 OUT V2- V2- V2 OUT ...

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