ha5352 Intersil Corporation, ha5352 Datasheet
ha5352
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ha5352 Summary of contents
Page 1
... The on-chip 15pF IN P-P hold capacitors are completely isolated to minimize droop rate and reduce the sensitivity of pedestal error. The HA5352 Dual Sample and Hold is available lead PDIP and 16 lead SOIC packages saving board space while its pinout is designed to simplify layout. Ordering Information PART ...
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... V IH Input Voltage (Low Specifications HA5352 Operating Conditions Operating Temperature Range HA5352I -40 Storage Temperature Range . . . . . . . . . . . . . -65 Thermal Package Characteristics o C Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . o C SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Signal to Noise Ratio V = 4.5V IN (RMS Signal to RMS Noise) SAMPLE AND HOLD CHARACTERISTICS Acquisition Time 0V to 2.0V Step to r1mV 0V to 2.0V Step to 0.01% (r200PV) -2.5V to +2.5V Step to 0.01% (r500PV) Specifications HA5352 = r5V Internal = 15pF, Digital Input: V SUPPLY H TEMP Full Full Full -40 ...
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... Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func- tional operation under any of these conditions is not necessarily implied. 2. Derived from Computer Simulation only, not tested. 3. +CMRR is measured from 0V to +2.5V, -CMRR is measured from 0V to -2.5V. Specifications HA5352 = r5V Internal = 15pF, Digital Input: V SUPPLY ...
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... Type: Sandwich Passivation Å Nitride - 4k , Undoped Si Glass(USG SUBSTRATE POTENTIAL: V- TRANSISTOR COUNT: 312 Metallization Mask Layout -IN1 +IN1 V1- V1- V1- +IN2 -IN2 HA5352 Å Å r Å , Total - 12k 2k HA5352 GND1 GND1 V1+ V1+ V1+ GND2 GND2 V2+ V2+ V2+ 3-5 S/H CONTROL1 V 1 OUT V 1 OUT V2- V2- V2 OUT ...