x5168s8z-2.7at2 Intersil Corporation, x5168s8z-2.7at2 Datasheet
x5168s8z-2.7at2
Related parts for x5168s8z-2.7at2
x5168s8z-2.7at2 Summary of contents
Page 1
Data Sheet CPU Supervisor with 16Kbit SPI EEPROM These devices combine three popular functions, Power-on Reset Control, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, ...
Page 2
... X5168P-2.7A X5168P AN X5169P-2.7A X5168PZ-2.7A X5168P Z AN X5169PZ-2.7A (Note) (Note) X5168PI-2.7A X5168P AP X5169PI-2.7A X5168PIZ-2.7A X5168P Z AP X5169PIZ-2.7A (Note) (Note) X5168S8-2.7A* X5168 AN X5169S8-2.7A X5168S8Z-2.7A* X5168 Z AN X5169S8Z-2.7A (Note) (Note) X5168S8I-2.7A* X5168 AP X5169S8I-2.7A X5168S8IZ-2.7A X5168 Z AP X5169S8IZ-2.7A (Note) (Note) 2 X5168, X5169 PART V RANGE ...
Page 3
... X5168P F X5169P-2.7 X5168PZ-2.7 X5168P Z F X5169PZ-2.7 (Note) (Note) X5168PI-2.7 X5168P G X5169PI-2.7 X5168PIZ-2.7 X5168P Z G X5169PIZ-2.7 (Note) (Note) X5168S8-2.7* X5168 F X5169S8-2.7* X5168S8Z-2.7* X5168 Z F X5169S8Z-2.7* (Note) (Note) X5168S8I-2.7* X5168 G X5169S8I-2.7* X5168S8IZ-2.7* X5168 Z G X5169S8IZ-2.7* (Note) (Note) X5168V14-2.7* X5168V F X5169V14-2.7* X5168V14Z-2.7* X5168V Z F X5169V14Z-2.7* ...
Page 4
Pin Description PIN (SOIC/PDIP) PIN TSSOP NAME SCK RESET/ RESET 3-5,10- X5168, X5169 Chip ...
Page 5
Principles of Operation Power-on Reset Application of power to the X5168, X5169 activates a power- on reset circuit. This circuit goes active at about 1V and pulls the RESET/RESET pin active. This signal prevents the system microprocessor from starting to ...
Page 6
New V Applied = CC Old V Applied + Error CC Error ≥ Emax Emax = Maximum Desired Error FIGURE 3. V 4.7K V TRIP + Adj. Program 6 X5168, X5169 V Programming TRIP Execute Reset V TRIP Sequence Set ...
Page 7
SPI Serial Memory The memory portion of the device is a CMOS serial EEPROM array with Intersil’s block lock protection. The array is internally organized The device features a Serial Peripheral Interface (SPI) and software protocol allowing ...
Page 8
The Write Enable Latch (WEL) bit indicates the status of the write enable latch. When WEL = 1, the latch is set HIGH and when WEL = 0 the latch is reset LOW. The WEL bit is a volatile, read ...
Page 9
Read Sequence When reading from the EEPROM memory array first pulled low to select the device. The 8-bit READ instruction is transmitted to the device, followed by the 16-bit address. After the READ opcode and address are sent, ...
Page 10
SCK Instruction SI High Impedance SO FIGURE 6. READ STATUS REGISTER SEQUENCE CS SCK SI High Impedance SO FIGURE 7. WRITE ENABLE LATCH SEQUENCE SCK Instruction ...
Page 11
CS 0 SCK SI High Impedance SO Symbol Table WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to LOW Don’t Care: Changes Allowed N/A 11 X5168, X5169 ...
Page 12
Absolute Maximum Ratings Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Storage Temperature . . . . . . . . . ...
Page 13
Equivalent A.C. Load Circuit 2.06kΩ Output RESET/RESET 3.03kΩ 100pF AC Electrical Specifications (Over recommended operating conditions, unless otherwise specified.) SYMBOL SERIAL INPUT TIMING f Clock frequency SCK t Cycle time CYC t CS lead time LEAD ...
Page 14
Serial Input Timing CS t LEAD SCK MSB IN High Impedance SO Serial Output Timing SYMBOL f Clock frequency SCK t Output disable time DIS t Output valid from clock low V t Output hold time HO ...
Page 15
Power-Up and Power-Down Timing V CC RESET (X5168) RESET (X5169) RESET Output Timing SYMBOL V Reset trip point voltage, X5168-4.5A, X5168-4.5A TRIP Reset trip point voltage, X5168, X5169 Reset trip point voltage, X5168-2.7A, X5169-2.7A Reset trip point voltage, X5168-2.7, X5169-2.7 ...
Page 16
V Reset Conditions TRIP SCK > Programmed V CC TRIP V Programming Specifications TRIP PARAMETER t SCK V program voltage setup time VPS TRIP t SCK V program voltage hold ...
Page 17
Typical Performance V Supply Current vs. Temperature ( Watchdog Timer Watchdog Timer Watchdog Timer Off ( -40C 25C Temp (°C) V vs. Temperature (programmed at ...
Page 18
Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...
Page 19
Plastic Dual-In-Line Packages (PDIP) D SEATING PLANE MDP0031 PLASTIC DUAL-IN-LINE PACKAGE SYMBOL PDIP8 PDIP14 A 0.210 0.210 A1 0.015 0.015 A2 0.130 0.130 b 0.018 0.018 b2 0.060 0.060 c 0.010 0.010 D 0.375 0.750 E 0.310 ...
Page 20
... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...