ak4353 AKM Semiconductor, Inc., ak4353 Datasheet

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ak4353

Manufacturer Part Number
ak4353
Description
96khz 24bit Dac With Dit
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
The AK4353 is a stereo CMOS D/A Converter and Digital Audio Interface Transmitter. The DAC signal
outputs are single-ended and are analog filtered to remove out of band noise. Therefore no external filters
are required. The AK4353 can operate at the power supply from 2.7V to 5.5V and the digital I/F can
correspond to both TTL and CMOS levels.
MS0016-E-01
o Stereo
o S/(N+D): 90dB@5V
o DR:
o S/N:
o Sampling Speed: 16kHz 96kHz
o Multiple Master Clock Frequencies:
o Data Input Formats:
o Selectable Function:
o Output Mode: Stereo, Mono, Reverse, Mute
o On-Chip Digital Audio Interface Transmitter:
o Input Level: TTL/CMOS Selectable
o Output Level: 3.0Vpp@5V
o Control mode: 3-wire Serial / I
o Low Power Dissipation: 80mW@5V
o Small 24pin VSOP Package
o Power Supply: 2.7 5.5V
o Ta: -40 85 C
256fs/384fs/512fs/768fs/1024fs/1536fs
256fs/384fs/512fs/768fs
128fs/192fs/256fs/384fs
LSB justified / MSB justified / I
Soft Mute
Digital Attenuator (256 Steps)
Digital De-emphasis (44.1kHz/48kHz/32kHz)
Compatible with S/PDIF, IEC958, AES/EBU
& EIAJ CP1201 consumer mode
102dB@5V
DAC
102dB@5V
GENERAL DESCRIPTION
FEATURES
2
- 1 -
C Bus
96kHz 24Bit
2
S selectable
for Half speed
for Normal speed (32kHz 48kHz)
for Double speed (64kHz 96kHz)
DAC with DIT
(16kHz 24kHz)
AK4353
[AK4353]
2000/07

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ak4353 Summary of contents

Page 1

... The AK4353 is a stereo CMOS D/A Converter and Digital Audio Interface Transmitter. The DAC signal outputs are single-ended and are analog filtered to remove out of band noise. Therefore no external filters are required. The AK4353 can operate at the power supply from 2.7V to 5.5V and the digital I/F can correspond to both TTL and CMOS levels. ...

Page 2

... CCLK CDTI Clock Generator 8X Interpolator Modulator 8X Interpolator Modulator MCKI MCKO CSN SCL SDA Clock Generator 8X Interpolator Modulator 8X Interpolator Modulator 2 C Bus Control Mode (I2C = “H” [AK4353] AVDD AVSS VCOM LPF AOUTL LPF AOUTR AVDD AVSS VCOM LPF AOUTL LPF AOUTR 2000/07 ...

Page 3

... AKD4353 Evaluation Board n Pin Layout MCKO DVDD 3 DVSS 4 MCKI 5 BICK 6 SDTI 7 LRCK 8 PDN 9 CSN 10 SCL/CCLK 11 SDA/CDTI 12 MS0016-E-01 24pin VSOP Top View [AK4353] DZF NC AVDD AVSS VCOM AOUTL AOUTR CAD1 CAD0 I2C TTL TST 2000/07 ...

Page 4

... LRCK I Serial Input Channel Clock Pin 9 PDN I Power-Down Pin When “L”, the circuit is in power-down mode. The AK4353 should always be reset upon power-up. 10 CSN I Chip Select Pin at 3-wire Serial control mode This pin should be connected to DVDD SCL I Control Clock Pin at I ...

Page 5

... MS0016-E-01 ABSOLUTE MAXIMUM RATINGS Symbol min AVDD -0.3 DVDD -0.3 (Note 2) - GND IIN - VINA -0.3 VIND -0.3 Ta -40 Tstg -65 Symbol min AVDD 2.7 DVDD 2.7 AVDD 4.5 DVDD 4 [AK4353] max Units 6.0 V 6 AVDD+0.3 V DVDD+0 150 C typ max Units 3.0 5.5 V 3.0 3.6 or AVDD V 5.0 5.5 V 5.0 AVDD ...

Page 6

... DVDD drops to 4mA at DVDD=3V. MS0016-E-01 min typ AVDD= AVDD= AVDD=5V 94 102 AVDD= AVDD=5V 94 102 AVDD= 110 0.2 20 AVDD=5V 2.8 3.0 AVDD=3V 1.66 1.8 (Note (Note [AK4353] max Units 24 Bits 0 ppm/ C 3.2 Vpp 1.94 Vpp 100 A 2000/07 ...

Page 7

... DVDD drops to 7mA at DVDD=3V. MS0016-E-01 min typ AVDD= AVDD= AVDD= AVDD= AVDD= AVDD= 110 0.2 20 AVDD=5V 2.8 3.0 AVDD=3V 1.66 1.8 (Note (Note [AK4353] max Units 24 Bits 0 ppm/ C 3.2 Vpp 1.94 Vpp 100 A 2000/07 ...

Page 8

... MS0016-E-01 Symbol min -0.02dB PB 0 -6.0dB - (Note (Note Symbol min -0.02dB PB 0 -6.0dB - (Note (Note [AK4353] typ max Units 20.0 kHz 22.05 - kHz kHz 0. 20 0.2 typ max Units 43.5 kHz 48.0 - kHz kHz dB 0.02 dB 20 0.2 ...

Page 9

... Iin - Symbol min (TTL pin) VIH 0.7xDVDD VIH 2.2 (TTL pin) VIL - VIL - Iout=-100µA) VOH DVDD-0.5 Iout=-100µA) VOH AVDD-0.5 Iout= 100µA) VOL - Iout= 3mA) VOL - Iin - - 9 - [AK4353] typ max Units - - V - 0.3xDVDD 0 0 typ max Units - ...

Page 10

... Note sampling speed mode (DFS0-1) changes, please reset by PDN pin or RSTN bit. 10. BICK rising edge must not occur at the same time as LRCK edge. 11. The AK4353 can be reset by PDN pin “L” upon power up. If CKS0-2 or DFS0-1 changes, the AK4353 should be reset by PDN pin or RSTN bit. MS0016-E-01 SWITCHING CHARACTERISTICS ...

Page 11

... Units 100 kHz - 1 2000/07 ...

Page 12

... BICK SDTI PDN MS0016-E-01 1/fCLK tCLKH tCLKL 1/fs 1/fBCK tBCKH tBCKL Clock Timing tLRB tSDS tSDH Serial Interface Timing tPDW Power-down & Reset Timing - 12 - [AK4353] VIH VIL dCLK=tCLKH*fCLK*100 =tCLKL*fCLK*100 VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL VIL 2000/07 ...

Page 13

... Stop Start MS0016-E-01 tCCKL tCCKH tCDS tCDH C0 R tHIGH tF tSU:DAT tSU:STA Start Bus mode Timing - 13 - [AK4353] VIH VIL VIH VIL VIH A4 VIL tCSW VIH VIL tCSH VIH VIL VIH VIL VIH VIL tSP VIH VIL tSU:STO Stop ...

Page 14

... All external clocks (MCKI,BICK,LRCK) should always be present whenever the AK4353 is in the normal operation mode (PDN = “H”). If these clock are not provided, the AK4353 may draw excess current and may not possibly operate properly because the device utilizes dynamic refreshed logic internally. If the external clocks are not present, the AK4353 should be in the power-down mode (PDN = “ ...

Page 15

... Don’t care Don’t care Don’t care Don’t care Figure 3. Mode 0-3 Timing - 15 - [AK4353] L/R BICK H/L 32fs H/L 36fs H/L 40fs H/L 48fs H/L 48fs L/H default 48fs ...

Page 16

... Don’t care 23 22 Lch Data Figure 5. Mode 5 Timing Sub-frame Sub-frame Frame 0 Figure 6. Block format - 16 - [AK4353 Don’t care Rch Data ...

Page 17

... Bit 28 is the validity flag. This is equal to V bit in the register. - Bit user data bit. This is always “0” in the AK4353. - Bit channel status bit. Frame 0 contains the first bit of the 192 bit word with the last bit in frame 191. ...

Page 18

... Table 5. De-emphasis filter control with DEM1-0 (DFS1-0=”00”) Table 6. De-emphasis filter control with DFS1-0 MS0016-E-01 DEM1 DEM0 De-emphasis 0 0 44.1kHz 0 1 OFF default 1 0 48kHz 1 1 32kHz DFS1 DFS0 De-emphasis 0 0 See Table 5. default 0 1 OFF 1 0 OFF 1 1 OFF - 18 - [AK4353] 2000/07 ...

Page 19

... When the input data at both channels are continuously zeros for 8192 LRCK cycles, DZF pin goes to “H”. DZF pin immediately goes to “L” if input data are not zero after going DZF “H”. MS0016-E-01 1024/fs (1) GD (2) (4) 8192/fs Figure 10. Soft mute and zero detection - 19 - [AK4353] (3) GD 2000/07 ...

Page 20

... Please mute the analog output externally if the click noise (3) influences system application. The timing example is shown in this figure. (6) DZF pin is “L” in the power-down mode (PDN = “L”). Figure 11. Power-down/up sequence example MS0016-E-01 Power-down “0” data (1) GD (3) (2) (3) (4) Don’t care (6) Mute [AK4353] Normal Operation (1) GD 2000/07 ...

Page 21

... There is a delay, 2~3/fs from RSTN bit “1” to the internal RSTN “1”. MS0016-E-01 2~3/fs (6) Digital Block Power-down “0” data GD (3) (2) (3) (4) Don’t care ”) of the internal timing of RSTN bit. This noise is output even if “0” data Figure 12. Reset sequence example - 21 - [AK4353] Normal Operation (1) GD 2/fs(5) 2000/07 ...

Page 22

... The CSN pin should be connected to DVDD at I register address auto increment capability. SDA SCL Start * When the AK4353 is in the power down mode (PDN = “L”) or the MCLK is not provided, writing into the control register is inhibited. MS0016-E- ...

Page 23

... DFS1 DFS0 PL2 PL1 PL0 ATT6 ATT5 ATT4 ATT6 ATT5 ATT4 CS29 CS28 CS25 CS14 CS13 CS12 - 23 - [AK4353 DIF2 DIF1 DIF0 RSTN CKS2 CKS1 CKS0 RSTN DEM1 DEM0 ATC SMUTE ATT3 ATT2 ATT1 ATT0 ATT3 ATT2 ATT1 ...

Page 24

... Reset. DZF pin goes to “H” and registers are not initialized. 1: Normal operation When the states of DIF2-0,CKS2-0 or DFS1-0 changes, the AK4353 should be reset by PDN pin or RSTN bit. Some click noise may occur at that timing. DIF2-0: Audio data interface modes (See Table 3.) Initial: “ ...

Page 25

... MUTE 1 MUTE R 0 MUTE L 1 MUTE (L+R)/ MUTE (L+R)/ MUTE (L+R)/2 0 (L+R)/2 MUTE 1 (L+R)/ (L+R)/ (L+R)/2 (L+R)/2 Table 7. Programmable Output Format - 25 - [AK4353 DEM1 DEM0 ATC SMUTE Note MUTE REVERSE STEREO default MONO 2000/07 ...

Page 26

... RSTN bit returns to “1”. Digital attenuator is independent of soft mute function. MS0016-E- ATT6 ATT5 ATT4 ATT6 ATT5 ATT4 (Binary level / 255) [dB [AK4353 ATT3 ATT2 ATT1 ATT0 ATT3 ATT2 ATT1 ATT0 2000/07 ...

Page 27

... Digital Audio Broadcast Reception in Japan (default) MS0016-E- CS29 CS28 CS25 CS14 CS13 CS12 [AK4353 TXE CS24 CS3 CS2 CS1 CS11 CS10 CS9 CS8 0 ...

Page 28

... MS0016-E-01 Bit 5 Bit 4 Bit 3 Bit 2 CS3 CS2 CS5 CS4 CS13 CS12 CS11 CS10 CS21 CS20 CS19 CS18 CS29 CS28 CS27 CS26 (Bold type: Programmable, Normal type: fixed in this device [AK4353] Bit 1 Bit 0 CS1 CS0 CS9 CS8 CS17 CS16 CS25 CS24 2000/07 ...

Page 29

... MS0016-E- [AK4353] 2000/07 ...

Page 30

... SYSTEM DESIGN 5 DZF 0.1u 10u AVDD 22 AVSS 21 VCOM 20 AK4353 10u 0.1u AOUTL 19 AOUTR 18 Top View CAD1 17 CAD0 16 I2C 15 TTL 14 TST 13 Analog Ground Figure 13. Typical Connection Diagram - 30 - [AK4353] Analog Lch + Lch MUTE Out 10u 220 27k Rch + Rch MUTE Out 10u 220 27k 2000/07 ...

Page 31

... Alternatively if AVDD and DVDD are supplied separately, the power up sequence is not critical. AVSS and DVSS of the AK4353 must be connected to analog ground plane. System analog ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit board ...

Page 32

... ASAHI KASEI 24pin VSOP (Unit: mm) *7.8 0. 0.22 0.1 Seating Plane 0.10 NOTE: Dimension "*" does not include mold flash. n Package & Lead frame material Package molding compound: Lead frame material: Lead frame surface treatment: MS0016-E-01 PACKAGE 0.65 0.15 0.05 Detail A Epoxy Cu Solder plate - 32 - [AK4353] 1.25 0.2 0.1 0.1 0-10 2000/07 ...

Page 33

... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0016-E-01 MARKING AKM AK4353VF AAXXXX Contents of AAXXXX AA: Lot# XXXX: Date Code IMPORTANT NOTICE - 33 - [AK4353] 2000/07 ...

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