ak4365 AKM Semiconductor, Inc., ak4365 Datasheet
ak4365
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ASAHI KASEI AK4368 xPLL & ¿ ¯ ¥ ¯ « Ø ¿ « ‘ ˘ Ø ‹ ' ‡ ‹ s ˇ ” ‘ ƒ ˆ ƒ I ...
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ASAHI KASEI PVDD PVSS MCKO MCLK BICK Audio PLL LRCK Interface SDATA DVDD DVSS ALC DEM ATT Digital Bass Filter Boost PDN I2C CAD0/CSN Serial I/F SCL/CCLK SDA/CDTI MS0409-J-01 VCOC LIN MIN DAC (Lch) 3D Stereo Enhancement DAC (Rch) RIN ...
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ASAHI KASEI „ ƒ … ‹ ¤ ¯ AK4368VG 30 AKD4368 AK4368 ; A „ — HPL 5 MIN 4 RIN 3 VCOC 2 PVDD MS0409-J-01 +85 ...
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... ASAHI KASEI „ AK4365, AK4367 – fl Ł AK4365 19.8/19.68/19.2/15.36/ PLL * : 14.4/13/12/11.2896MHz 8/11.025/16/22.05/24/32/ PLL 0 – ‹ 44.1/48kHz 20bit ƒ ˆ ƒ I/F ¥ ¿ ˜ 16/20bit † » ¯ Available ALC N/A 3D Stereo Enhancement N/A Z Mono 3-wire fl » £ +6dB ˜ ...
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ASAHI KASEI No. I/O — ˚ ¶ B1 MCKO O » « Ø ¿ « Z — C2 DVSS - ˆ · » ‹ C1 DVDD - ˆ · » — fl ˜ Ø D2 I2C I 2 ...
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ASAHI KASEI No. I/O — ˚ ¶ Connect Pin A7 No internal bonding. These pins should be connected to ground Note: ˆ · » — (I2C, SDA/CDTI, SCL/CCLK, ...
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ASAHI KASEI (AVSS, DVSS, HVSS, PVSS=0V; Note 1) Parameter Power Supplies Analog Digital PLL HP-Amp |AVSS – DVSS| (Note 2) |AVSS – HVSS| (Note 2) |AVSS – PVSS| (Note 2) Input Current (any pins except for supplies) Analog Input Voltage ...
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ASAHI KASEI ( ø x Ta=25 C; AVDD=PVDD=DVDD=HVDD=2.4V, AVSS=PVSS=DVSS=HVSS=0V; fs=44.1kHz; EXT mode; BOOST OFF; Slave Mode; Signal Frequency =1kHz; Measurement band width=20Hz Headphone-Amp =220 Parameter DAC Resolution Headphone-Amp: (HPL/HPR pins) ...
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ASAHI KASEI Parameter LINEIN: (LIN/RIN/MIN pins) Analog Input Characteristics Input Resistance (Figure 23, Figure 24 LIN pin LINHL bit = “1”, LINL bit = “1” LINHL bit = “1”, LINL bit = “0” LINHL bit = “0”, LINL bit = ...
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ASAHI KASEI (Ta=25 C; AVDD, DVDD, PVDD, HVDD=1.6 Parameter DAC Digital Filter: (Note 12) Passband (Note 13) 0.05dB 6.0dB Stopband (Note 13) Passband Ripple Stopband Attenuation Group Delay (Note 14) Group Delay Distortion DAC Digital Filter + Analog Filter: (Note ...
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ASAHI KASEI (Ta=25 C; AVDD, DVDD, PVDD, HVDD=1.6 Parameter High-Level Input Voltage 2.2V DVDD 3.6V 1.6V DVDD<2.2V Low-Level Input Voltage 2.2V DVDD 3.6V 1.6V DVDD<2.2V Input Voltage at AC Coupling (Note 18) High-Level Output Voltage (Iout= 200 A) Low-Level Output ...
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ASAHI KASEI (Ta=25 C; AVDD, DVDD, PVDD, HVDD=1.6 Parameter Master Clock Input Timing Frequency (PLL mode) (EXT mode) Pulse Width Low (Note 19) Pulse Width High (Note 19) AC Pulse Width (Note 20) LRCK Timing Frequency Duty Cycle: Slave Mode ...
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ASAHI KASEI Parameter 2 Control Interface Timing (I C Bus mode): (Note 23) SCL Clock Frequency Bus Free Time Between Transmissions Start Condition Hold Time (prior to first clock pulse) Clock Low Time Clock High Time Setup Time for Repeated ...
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ASAHI KASEI „ » ‹ 1000pF MCLK Input MCKI tCLKH LRCK BICK tBCKH MCKO tH MS0409-J-01 Measurement Point 100k DVSS DVSS Figure 3. MCKI AC Coupling Timing 1/fCLK tCLKL 1/fs tBCK tBCKL tL dMCK=tH/(tH+tL) or tL/(tH+tL) Figure 4. Clock Timing ...
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ASAHI KASEI LRCK tBLR BICK SDATA Figure 5. Serial Interface Timing (Slave Mode) LRCK tMBLR BICK SDATA Figure 6. Serial Interface Timing (Master mode) MS0409-J-01 tLRB tSDS tSDH tSDH tSDS - 15 - [AK4368] VIH VIL VIH VIL VIH VIL ...
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ASAHI KASEI CSN tCSS CCLK CDTI CSN CCLK CDTI D3 SDA tBUF tLOW tR SCL tHD:STA tHD:DAT Stop Start PDN MS0409-J-01 tCCKL tCCKH tCDS tCDH C1 C0 R/W Figure 7. WRITE Command Input Timing Figure 8. WRITE ...
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ASAHI KASEI „ ‡ ´ « Ø ¿ « 1) PLL ¯ (PMPLL bit = “1”) ” ˘ Ø ‹ PLL xPLL3-0 bits, FS3-0 bits (Table 1, Table 2) p ‹ R ‘ h « Ø ¿ ...
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ASAHI KASEI Ł ¯ z BICK, LRCK pin ‘ ¯ MCKO t 8 ‘ h BICK, LRCK AK4368 Ł ¯ (M/S bit = “0”) zPMPLL bit = “0” Æ “1” PMDAC bit ...
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ASAHI KASEI Mode FS3 11-15 Table 2. – Table 3. MCKO * : (PLL mode, MCKO bit = “1”) Power ...
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ASAHI KASEI 2) « Ø ¿ « ¯ (PMPLL bit = “0”: Default) PMPLL bit “0” « Ø ¿ « DAC t » « Ø ¿ « ø ...
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ASAHI KASEI Mode FS3 FS2 Others 11-15 Table 6. – Table ...
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ASAHI KASEI „ ‡ ˆ » » £ SDATA, BICK, LRCK w3pin ; ‘ o ˜(Table 11) U DIF2-0 bits p ‹ Mode 1 xMode 0 w20bit [ Mode 4 ...
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ASAHI KASEI Lch LRCK ...
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ASAHI KASEI „ ALC ^ ALC bit = “1” ALC [1] ALC ¿ » ^ ALC ¿ » DAC wL/R ‰ ( 6.0dBFS ø z ALC ...
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ASAHI KASEI [2] ALC § ^ ALC § ALC ¿ » DAC w Ł U § § ¢ » • ¿ ˜ Ł ALC ^ M ...
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ASAHI KASEI [3] ALC ^ q « Register Name Comment ROTM1-0 Zero crossing timeout period REF7-0 Maximum gain at recovery operation LMAT1-0 Limiter ATT step RATT Recovery GAIN step ALC ALC enable ALC ^ ⁄ < w ˇ ...
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ASAHI KASEI „ ˆ · » Z Æ AK4368 xMUTE 0.5dB ´ ¿ z 256 Ł Æ x DAC w † (Table 17) {DATTC bit “1” ATTL7-0 bit pLch, ...
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ASAHI KASEI „ „ ˜ Æ ˜ „ ˜ Æ ˜ x ˆ · » ATT › (Table 18 ATT ATT › p ATT ‡ ª ^ † ´ ‡ ...
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ASAHI KASEI „ ˆ ⁄ ‡ » IIR » (32kHz, 44.1kHz, 48kHz ˆ ⁄ DEM1-0 bit p ‹ ˆ ⁄ DEM1 bit Table ...
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ASAHI KASEI „ (HPL, HPR pins) ¿ ¯ ¥ ¿ ¯ ¥ HVDD T 16 ˝ PMHPL=PMHPR bits = “1” pMUTEN bit q j ˝ MUTEN bit “0” ...
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ASAHI KASEI ¿ ¯ ¥ w ¯ q fl ˆ – p § ¿ ˜ ƒ ˆ – § ¿ ˜ ƒ (fc ‘ ˝ º x AVDD=2.4, 3.0, ...
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ASAHI KASEI „ (LOUT, ROUT pins) ´ Ł ƒ Z fl 0.475 x AVDD ? ¯ ON/OFF DACL, LINL, MINL, DACR, RINR, MINR bits p ATTS3-0 bits = ...
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ASAHI KASEI „ 3D Stereo Enhancement AK4368 x ´ Ł ƒ 3D fi L ¸ ˝ º · ˜ M bits { 50ms ¿ ...
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ASAHI KASEI „ ˝ º ¿ … ¢ ‡ › 1) DAC HP-Amp Power Supply (1) >150ns PDN pin (2) >0 PMVCM bit Don’t care (3) Clock Input PMDAC bit DAC Internal PD State SDTI pin DACHL, (4) >0 DACHR ...
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ASAHI KASEI 2) DAC Lineout Power Supply (1) >150ns PDN pin (2) >0 PMVCM bit Clock Input Don’t care PMDAC bit DAC Internal PD(Power-down) State SDTI pin DACL, (3) >0 DACR bits 3D1-0 bits “00”(3D OFF) (when 3D is used) ...
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ASAHI KASEI 3) LIN/RIN/MIN HP-Amp, Lineout Power Supply (1) >150ns PDN pin (2) >0 PMVCM bit LINHL, MINHL, RINHR, MINHR (3) >0 LINL, RINR, MINL, MINR bits 3D1-0 bits “00” (3D OFF) (when 3D is used) PMHPL/R bits MUTEN bit ...
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ASAHI KASEI „ ˝ º ¿ … ¢ ‡ › 1) DAC HP-Amp Power Supply (1) >150ns PDN pin (2) >0 PMVCM, PMPLL, PMDAC, MCKO bits Don’t care (3) MCKI pin Unstable (4) ~20ms ...
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ASAHI KASEI 2) DAC Lineout Power Supply (1) >150ns PDN pin (2) PMVCM, PMPLL, >0 PMDAC, MCKO bits Don’t care (3) MCKI pin (4) ~20ms Unstable ...
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ASAHI KASEI 3) LIN/RIN/MIN HP-Amp, Lineout Power Supply (1) >150ns PDN pin (2) >0 PMVCM bit LINHL, MINHL, RINHR, MINHR (3) >0 LINL, RINR, MINL, MINR bits 3D1-0 bits “00” (3D OFF) (when 3D is used) PMHPL/R bits MUTEN bit ...
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ASAHI KASEI „ AK4368 ˝ º ¿ … ¢ ‡ › 1) DAC HP-Amp Power Supply (1) >150ns PDN pin (2) >0 M/S, PMVCM, PMPLL, PMDAC, MCKO bits Don’t care (3) MCKI pin Unstable (4) ~20ms ...
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ASAHI KASEI 2) DAC Lineout Power Supply (1) >150ns PDN pin (2) M/S, PMVCM, PMPLL, >0 PMDAC, MCKO bits Don’t care (3) MCKI pin (4) ~20ms Unstable ...
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ASAHI KASEI 3) LIN/RIN/MIN HP-Amp, Lineout Power Supply (1) >150ns PDN pin (2) >0 PMVCM bit LINHL, MINHL, RINHR, MINHR (3) >0 LINL, RINR, MINL, MINR bits 3D1-0 bits “00” (3D OFF) (when 3D is used) PMHPL/R bits MUTEN bit ...
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ASAHI KASEI „ ‡ fl ˜ Ø » £ (1) 3 ¢ ‡ fl ˜ Ø ¯ Ł · » ¢ ‡ I/F — address(2bits, “01” Read/Write(1bit, Fixed to “1”, Write only), Register address(MSB first, 5bits), ...
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ASAHI KASEI 2 ( (I2C pin = “H”) fl ˜ Ø ¯ 2 AK4368 wI C ¯ w ¥ ¿ ˜ (2)-1. WRITE ¸ ¯ ˆ » ...
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ASAHI KASEI (2)-2. READ ¸ ' R/W ˇ ¿ ˜ U “1” w ø z AK4368 xREAD » U › E ø c ‹ – Ł w ˆ » ¡ ...
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ASAHI KASEI SDA SCL S start condition DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER SCL FROM MASTER S START CONDITION SDA SCL MS0409-J-01 Figure 42 › Figure 43 ‹ ...
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ASAHI KASEI „ Ł · » ¿ Addr Register Name 00H Power Management 01H PLL Control 02H Clock Control 03H Mode Control 0 04H Mode Control 1 05H DAC Lch ATT ATTL7 06H DAC Rch ATT ATTR7 07H Headphone Out ...
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ASAHI KASEI „ ˜ I Addr Register Name 00H Power Management R/W Default PMVCM: VCOM w ˝ º · 0: Power OFF (Default) 1: Power ON PMDAC: DAC w ˝ º · 0: Power OFF (Default) 1: Power ON OFF ...
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ASAHI KASEI Addr Register Name 02H Clock Control R/W Default MCKO: MCKO ł M ‘ Disable (Default) 1: Enable PS1-0: MCKO * : PLL mode: Table 3 EXT mode: Table 7 BF: » ¯ w BICK * ...
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ASAHI KASEI Addr Register Name 04H Mode Control 1 R/W Default DEM1-0: ˆ ⁄ ‡ Default: “01” (OFF) BST1-0: ˜ (Table 20) Default: “00” (OFF) SMUTE: DAC ˆ » „ ˜ Æ ˜ ‘ ...
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ASAHI KASEI Addr Register Name 07H Headphone Out Select R/W Default DACHL: DAC wLch w Z ł 0: OFF (Default DACHR: DAC wRch w Z ł 0: OFF (Default LINHL: LIN pin ł ...
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ASAHI KASEI Addr Register Name 08H Lineout Select R/W Default DACL: DAC wLch w Z ł 0: OFF (Default DACR: DAC wRch w Z ł 0: OFF (Default LINL: LIN pin ł 0: ...
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ASAHI KASEI Addr Register Name 0AH ALC Mode Control 1 REF7 R/W Default REF7-0: ALC § Addr Register Name 0BH ALC Mode Control 2 R/W Default RATT: ALC § fi ´ ¿ LMAT1-0: ALC ¿ ...
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ASAHI KASEI ‡ ´ « Figure 45 t ‘ Ø ˇ Analog Supply + 1.6 3. 10µ x ...
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ASAHI KASEI 1. ‹ ¯ ˆ § ¿ ‹ ‹ ¯ « ‘ o < Ł z DVDD t x AVDD ‡ ...
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ASAHI KASEI 4.0 0.1 „ ¿ ˝ ¿ › · ⁄ ' ‡ • Ł · » † SnAgCu R > P MS0409-J-01 ˝ ¿ › · 41 ...
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ASAHI KASEI Date (YY/MM/DD) Revision Reason 05/08/ 05/08/ ¸ MS0409-J-01 ' ‹ 4368 XXXX XXXX: Date code (4 digit) Pin #1 indication ~ d ” Page Contents 5 fl — fiAVSS ...
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ASAHI KASEI { … … ‘ … ~ ‡ ’ ¸ ...