ak4364 AKM Semiconductor, Inc., ak4364 Datasheet
ak4364
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ak4364 Summary of contents
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... ASAHI KASEI The AK4364 is a stereo CMOS D/A Converter and Phase Locked Loop for use in digital video broadcast set-top box applications or DVD. The DAC signal outputs are single-ended and are analog filtered to remove out of band noise. Therefore no external filters are required. The PLL provides selectable sampling clock frequencies locked to the 27MHz recovered MPEG clock ...
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... Modulator 8X Interpolator Modulator MCKI MCKO CSN SCL SDA PLL & Clock Generator 8X Interpolator Modulator 8X Interpolator Modulator 2 C Bus Control Mode (I2C = “H” [AK4364] FLT AVDD AVSS VCOM LPF AOUTL LPF AOUTR FLT AVDD AVSS VCOM LPF AOUTL LPF AOUTR 2001/05 ...
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... Evaluation Board n Pin Layout MCKO DVDD 3 DVSS 4 MCKI 5 BICK 6 SDTI 7 LRCK 8 PDN 9 CSN 10 SCL/CCLK 11 SDA/CDTI 12 MS0014-E-02 24pin VSOP Top View [AK4364] DZF FLT AVDD AVSS VCOM AOUTL AOUTR CAD1 CAD0 I2C TTL TST 2001/05 ...
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... LRCK I Serial Input Channel Clock Pin 9 PDN I Power-Down Pin When “L”, the circuit is in power-down mode. The AK4364 should always be reset upon power-up. 10 CSN I Chip Select Pin at 3-wire Serial control mode This pin should be connected to DVDD SCL I Control Clock Pin at I ...
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... MS0014-E-02 ABSOLUTE MAXIMUM RATINGS Symbol min AVDD -0.3 DVDD -0.3 (Note 2) - GND IIN - VINA -0.3 VIND -0.3 Ta -40 Tstg -65 Symbol min AVDD 2.7 DVDD 2.7 AVDD 4.5 DVDD 4 [AK4364] max Units 6.0 V 6 AVDD+0.3 V DVDD+0 150 C typ max Units 3.0 5.5 V 3.0 3.6 or AVDD V 5.0 5.5 V 5.0 AVDD ...
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... AVDD is 9mA(typ) at EXT = “0”. DVDD drops to 4mA at DVDD=3V. MS0014-E-02 min typ AVDD= AVDD= AVDD=5V 94 102 AVDD= AVDD=5V 94 102 AVDD= 110 0.2 20 AVDD=5V 2.8 3.0 AVDD=3V 1.66 1.8 (Note 4) 10 (Note [AK4364] max Units 24 Bits 0 ppm/ C 3.2 Vpp 1.94 Vpp 100 A 2001/05 ...
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... AVDD is 9mA(typ) at EXT = “0”. DVDD drops to 7mA at DVDD=3V. MS0014-E-02 min typ AVDD= AVDD= AVDD= AVDD= AVDD= AVDD= 110 0.2 20 AVDD=5V 2.8 3.0 AVDD=3V 1.66 1.8 (Note 4) 10 (Note [AK4364] max Units 24 Bits 0 ppm/ C 3.2 Vpp 1.94 Vpp 100 A 2001/05 ...
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... MS0014-E-02 Symbol min -0.02dB PB 0 -6.0dB - (Note (Note Symbol min -0.02dB PB 0 -6.0dB - (Note (Note [AK4364] typ max Units 20.0 kHz 22.05 - kHz kHz 0. 20 0.2 typ max Units 43.5 kHz 48.0 - kHz kHz dB 0.02 dB 20 0.2 ...
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... Iin - Symbol min (TTL pin) VIH 0.7xDVDD VIH 2.2 (TTL pin) VIL - VIL - Iout=-100µA) VOH DVDD-0.5 Iout=-100µA) VOH AVDD-0.5 Iout= 100µA) VOL - Iout= 3mA) VOL - Iin - - 9 - [AK4364] typ max Units - - V - 0.3xDVDD 0 0 typ max Units - ...
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... Note sampling speed mode (DFS0-1) changes, please reset by PDN pin or RSTN bit. 10. BICK rising edge must not occur at the same time as LRCK edge. 11. The AK4364 can be reset by PDN pin “L” upon power up. If CKS0-2 or DFS0-1 changes, the AK4364 should be reset by PDN pin or RSTN bit. MS0014-E-02 SWITCHING CHARACTERISTICS ...
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... Units 100 kHz - 1 2001/05 ...
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... Clock Timing tLRB tSDS tSDH Serial Interface Timing tPDW Power-down & Reset Timing - 12 - [AK4364] VIH VIL VIH VIL dCLK=tCLKH*fCLK*100 =tCLKL*fCLK*100 50%DVDD VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL VIL ...
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... Stop Start MS0014-E-02 tCCKL tCCKH tCDS tCDH C0 R tHIGH tF tSU:DAT tSU:STA Start Bus mode Timing - 13 - [AK4364] VIH VIL VIH VIL VIH A4 VIL tCSW VIH VIL tCSH VIH VIL VIH VIL VIH VIL tSP VIH VIL tSU:STO Stop ...
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... When EXT bit is set to “1”, master clock can be input via MCKI pin. In this case, MCKO frequency is same as MCKI and it is not necessary to change the register data of FS1-0. The external clocks which are required to operate the AK4364 are MCKI, LRCK and BICK. The master clock (MCKI) should be synchronized with sampling clock (LRCK) but the phase is not critical ...
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... LSB justified 1 1 24bit, LSB justified 0 0 24bit, MSB justified Reserved 1 1 Reserved Table 4. Audio Data Format - 15 - [AK4364] “01” (Double speed) 128fs default (DFS1-0 = “00”) 256fs 192fs 384fs 256fs N/A 384fs N/A 768fs 1024fs 1536fs 12.2880 16.3840 24.5760 24.5760 - ...
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... Don’t care Don’t care Figure 3. Mode 0-3 Timing Don’t care 23 22 ure Fig 4. Mode 4 Timing - 16 - [AK4364 ...
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... Don’t care 23 22 Lch Data Figure 5. Mode 5 Timing Sub-frame Sub-frame Frame 0 Figure 6. Block format Figure 7. A biphase-encoded bit stream - 17 - [AK4364 Don’t care Rch Data Frame 2001/05 ...
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... Bit 28 is the validity flag. This is equal to V bit in the register. - Bit user data bit. This is always “0” in the AK4364. - Bit channel status bit. Frame 0 contains the first bit of the 192 bit word with the last bit in frame 191. ...
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... Table 6. De-emphasis filter control with DEM1-0 (DFS1-0 = “00”) Table 7. De-emphasis filter control with DFS1-0 MS0014-E-02 DEM1 DEM0 De-emphasis 0 0 44.1kHz 0 1 OFF default 1 0 48kHz 1 1 32kHz DFS1 DFS0 De-emphasis 0 0 See Table 6. default 0 1 OFF 1 0 OFF 1 1 OFF - 19 - [AK4364] 2001/05 ...
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... When the input data at both channels are continuously zeros for 8192 LRCK cycles, DZF pin goes to “H”. DZF pin immediately goes to “L” if input data are not zero after going DZF “H”. MS0014-E-02 1024/fs (1) GD (2) (4) 8192/fs Figure 10. Soft mute and zero detection - 20 - [AK4364] (3) GD 2001/05 ...
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... Please mute the analog output externally if the click noise (3) influences system application. The timing example is shown in this figure. (6) DZF pin is “L” in the power-down mode (PDN = “L”). Figure 11. Power-down/up sequence example MS0014-E-02 Power-down “0” data (1) GD (3) (2) (3) (4) Don’t care (6) Mute [AK4364] Normal Operation (1) GD 2001/05 ...
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... There is a delay, 2~3/fs from RSTN bit “1” to the internal RSTN “1”. MS0014-E-02 2~3/fs (6) Digital Block Power-down “0” data GD (3) (2) (3) (4) Don’t care ”) of the internal timing of RSTN bit. This noise is output even if “0” data Figure 12. Reset sequence example - 22 - [AK4364] Normal Operation (1) GD 2/fs(5) 2001/05 ...
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... The CSN pin should be connected to DVDD at I register address auto increment capability. SDA SCL Start * When the AK4364 is in the power down mode (PDN = “L”) or the MCLK is not provided, writing into the control register is inhibited. MS0014-E- ...
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... FS0 DFS1 DFS0 PL2 PL1 PL0 ATT6 ATT5 ATT4 ATT6 ATT5 ATT4 CS29 CS28 CS25 CS14 CS13 CS12 - 24 - [AK4364 DIF2 DIF1 DIF0 RSTN CKS2 CKS1 CKS0 RSTN DEM1 DEM0 ATC SMUTE ATT3 ATT2 ATT1 ATT0 ATT3 ATT2 ...
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... Reset. DZF pin goes to “H” and registers are not initialized. 1: Normal operation When the states of DIF2-0,EXT,CKS2-0,DFS1-0 or FS1-0 changes, the AK4364 should be reset by PDN pin or RSTN bit. Some click noise may occur at that timing. DIF2-0: Audio data interface modes (See Table 4.) Initial: “ ...
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... MUTE 1 MUTE R 0 MUTE L 1 MUTE (L+R)/ MUTE (L+R)/ MUTE (L+R)/2 0 (L+R)/2 MUTE 1 (L+R)/ (L+R)/ (L+R)/2 (L+R)/2 Table 8. Programmable Output Format - 26 - [AK4364 DEM1 DEM0 ATC SMUTE Note MUTE REVERSE STEREO default MONO 2001/05 ...
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... When RSTN bit goes to “0”, the ATT values are set to 00H. The ATT values fade to their current values after RSTN bit returns to “1”. Digital attenuator is independent of soft mute function. MS0014-E- ATT6 ATT5 ATT4 ATT6 ATT5 ATT4 (Binary level / 255) [dB [AK4364 ATT3 ATT2 ATT1 ATT0 ATT3 ATT2 ATT1 ATT0 2001/05 ...
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... Digital Audio Broadcast Reception in Japan (default) MS0014-E- CS29 CS28 CS25 CS14 CS13 CS12 [AK4364 TXE CS24 CS3 CS2 CS1 CS11 CS10 CS9 CS8 0 ...
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... MS0014-E-02 Bit 5 Bit 4 Bit 3 Bit 2 CS3 CS2 CS5 CS4 CS13 CS12 CS11 CS10 CS21 CS20 CS19 CS18 CS29 CS28 CS27 CS26 (Bold type: Programmable, Normal type: fixed in this device [AK4364] Bit 1 Bit 0 CS1 CS0 CS9 CS8 CS17 CS16 CS25 CS24 2001/05 ...
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... MS0014-E- [AK4364] 2001/05 ...
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... AOUTL 19 AOUTR 18 Top View CAD1 17 CAD0 16 I2C 15 TTL 14 TST 13 Analog Ground Figure 13. Typical Connection Diagram if the distortion at low frequency (around 1kHz) is critical [AK4364] Analog 5V 0.22u + + Lch + Lch MUTE Out 10u 220 27k Rch + Rch MUTE Out 10u 220 27k 2001/05 ...
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... Alternatively if AVDD and DVDD are supplied separately, the power up sequence is not critical. AVSS and DVSS of the AK4364 must be connected to analog ground plane. System analog ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit board ...
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... ASAHI KASEI 24pin VSOP (Unit: mm) *7.8 0. 0.22 0.1 Seating Plane 0.10 NOTE: Dimension "*" does not include mold flash. n Package & Lead frame material Package molding compound: Lead frame material: Lead frame surface treatment: MS0014-E-02 PACKAGE 0.65 0.15 0.05 Detail A Epoxy Cu Solder plate - 33 - [AK4364] 1.25 0.2 0.1 0.1 0-10 2001/05 ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0014-E-02 MARKING AKM AK4364VF AAXXXX Contents of AAXXXX AA: Lot# XXXX: Date Code IMPORTANT NOTICE - 34 - [AK4364] 2001/05 ...