ak4373 ETC-unknow, ak4373 Datasheet - Page 94

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ak4373

Manufacturer Part Number
ak4373
Description
Low Power Stereo Dac With Hp/spk-amp
Manufacturer
ETC-unknow
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ak4373EN-L
Manufacturer:
AKM
Quantity:
20 000
MS0991-E-00
Headphone-amp Output (Single-Ended or Differential or Pseudo cap-less)
<Example>
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4373 is PLL mode, DAC and Speaker-Amp should be
(2) Set up the path of “DAC → HP-Amp”: DACH bit = “0” → “1”
(3) Select output type of the headphone (HPBTL and PSEUDO bits “00”= Single-ended, “10”=Differential,
(4) Set up the ALC Block Digital Volume (Addr: 09H and 0CH)
(5) Set up the output digital volume (Addr: 0AH and 0DH)
(6) Power up DAC: PMDAC bit = “0” → “1”
(7) Power up headphone-amp: PMHPL = PMHPR bits = “0” → “1”
(8) Rise up the common voltage of headphone-amp: HPMTN bit = “0” → “1”
(9) Fall down the common voltage of headphone-amp: HPMTN bit = “1” → “0”
(10) Power down headphone-amp: PMHPL = PMHPR bits = “1” → “0”
(11) Power down DAC: PMDAC bit = “1” → “0”
(12) Disable the path of “DAC → HP-Amp”: DACH bit = “1” → “0”
powered-up in consideration of PLL lock time after a sampling frequency is changed.
“01”=Pseudo cap-less)
AVL7-0 and AVR7-0 bits should be set to “91H”(0dB).
When ALC bit is “1”, ALC operation starts from the gain set by AVL/R7-0 bits.
When DVOLC bit is “1” (default), DVL7-0 bits set the volume of both channels. After DAC is powered-up,
the digital volume changes from default value (0dB) to the register setting value by the soft transition.
Output voltage of headphone-amp is still VSS2.
The rise time depends on HVDD and the capacitor value which connected with the MUTET pin. When
HVDD=3.3V and the capacitor value is 1.0μF, the time constant is
If the power supply is powered-off or headphone-Amp is powered-down before the common voltage changes
to GND, the pop noise occurs. It takes twice of
The fall time depends on HVDD and the capacitor value which connected with the MUTET pin. When
HVDD=3.3V and the capacitor value is 1.0μF, the time constant is
(Addr:05H, D5&D2-0)
(Addr:09H&0CH, D7-0)
(Addr:0AH&0DH, D7-0)
PMHPL/R bits
DVL/R7-0 bits
HPBTL,PSEU
(Addr:02H, D3,D1)
IVL/R7-0 bits
(Addr:01H, D5-4)
HPR+/- pins
HPL+/- pins
(Addr:0FH, D0)
(Addr:01H, D6)
HPL/R pins
(Addr:00H, D2)
(Addr:00H, D5)
PMDAC bit
HPMTN bit
PMMIN bit
HVCM pin
DACH bit
FS3-0 bits
DO bits
0,000
E1H
"0"
18H
(1)
Figure 77. Headphone-Amp Output Sequence
(3)
(2)
(4)
(5)
Differential)/ "01"(Pseudo cap-less)
(6)
"00"(Single-ended)/ "10"(Full-
(7)
(8)
Normal Output
1,111
- 94 -
τ
91H
28H
f
that the common voltage changes to GND.
(9)
(10)
(11)
(12)
τ
τ
r
f
= 100ms(typ), 250ms(max).
Example:
= 100ms(typ), 250ms(max).
PLL, Master M ode
Sam pling Frequency: 44.1kHz
Digital Volume: −8 dB
Bass B oost Level : M iddle
Audio I/F F ormat :MSB justified
(1) Addr:05H, Data:27H
(2) Addr:0FH, Data:09H
(6) Addr:00H, Data:64H
(7) Addr:01H, Data:39H
(8) Addr:01H, Data:79H
(9) Addr:01H, Data:39H
(4) Addr:09H&0CH, Data:91H
(5) Addr:0AH&0DH, Data:28H
(3) Addr:02H, Data:00H/08H/02H
(10) Addr:01H, Data:09H
(11) Addr:00H, Data:40H
(12) Addr:0FH, Data:08H
Playback
[AK4373]
2008/09

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