ak4373 ETC-unknow, ak4373 Datasheet - Page 95

• Manufacturer Part Number: ak4373
• Description: Low Power Stereo Dac With Hp/spk-amp
• Manufacturer: ETC-unknow

■
Master clock can be stopped when DAC is not used.
1. PLL Master Mode
2. PLL Slave Mode (LRCK or BICK pin)
3. PLL Slave (MCKI pin)
MS0991-E-00
External LRCK
External MCKI
External MCKI
External BICK
(Addr:01H, D0)
(Addr:01H, D1)
(Addr:01H, D0)
(Addr:01H, D0)
(Addr:01H, D1)
Stop of Clock
<Example>
<Example>
<Example>
PMPLL bit
PMPLL bit
PMPLL bit
MCKO bit
MCKO bit
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop MCKO clock: MCKO bit = “1” → “0”
(3) Stop an external master clock.
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external BICK and LRCK clocks
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external master clock.
Stop MCKO output: MCKO bit = “1” → “0”
"1" or "0"
Input
Input
Input
Input
(1)
(1)
(1)
(1)
(2)
(3)
(2)
(2)
(2)
Figure 78. Clock Stopping Sequence (1)
Figure 79. Clock Stopping Sequence (2)
Figure 80. Clock Stopping Sequence (3)
- 95 -
Example:
Example
Example
Input Master Clock Select at PLL Mode: 11.2896MHz
BICK frequency at Master Mode: 64fs
Audio I/F Format : MSB justified
Audio I/F Format: MSB justified
Audio I/F Format: MSB justified
PLL Reference clock: MCKI
PLL Reference clock: BICK
BICK frequency: 64fs
BICK frequency: 64fs
(1) (2) Addr:01H, Data:08H
(3) Stop an external MCKI
(2) Stop the external clocks
(2) Stop the external clocks
(1) Addr:01H, Data:00H
(1) Addr:01H, Data:00H
[AK4373]
2008/09