adum3220 Analog Devices, Inc., adum3220 Datasheet - Page 11

• Manufacturer Part Number: adum3220
• Description: 4 A Dual-channel Gate Driver Adum3220
• Manufacturer: Analog Devices, Inc.

APPLICATIONS INFORMATION
PC BOARD LAYOUT
The ADuM3220 digital isolator requires no external interface
circuitry for the logic interfaces. Power supply bypassing is
required at the input and output supply pins, as shown in
Figure 16. Use a small ceramic capacitor with a value between
0.01 μF and 0.1 μF to provide a good high frequency bypass.
On the output power supply pin, V
add a 10 μF value to provide the charge required to drive the
gate capacitance at the ADuM3220 outputs. On the output
supply pins, the bypass capacitors use of vias should be avoided
or multiple vias should be employed to reduce the inductance in
the bypassing. The total lead length between both ends of the
smaller capacitor and the input or output power supply pin
should not exceed 20 mm.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation delay
to a logic high output. The ADuM3220 specifies t
Figure 17) as the time between the rising input high logic
threshold, V
falling propagation delay, t
the input falling logic low threshold, V
90% threshold. The rise and fall times are dependent on the
loading conditions and are not included in the propagation
delay, as is the industry standard for gate drivers.
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM3220 component.
Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM3220
components operating under the same conditions.
OUTPUT
INPUT
GND
V
DD1
IH
90%
10%
1
, to the output rising 10% threshold. Likewise, the
V
V
Figure 17. Propagation Delay Parameters
IH
IL
Figure 16. Recommended PCB Layout
V
V
IA
IB
t
DLH
DHL
, is defined as the time between
t
R
DD2
V
V
OA
OB
it is recommended to also
IL
, and the output falling
t
DHL
V
GND
t
F
DD2
DLH
2
(see
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THERMAL LIMITATIONS AND SWITCH LOAD
CHARACTERISTICS
For isolated gate drivers, the necessary separation between the
input and output circuits prevents the use of a single thermal
pad beneath the part, and heat is, therefore, dissipated mainly
through the package pins.
Package thermal dissipation limits the performance of switching
frequency versus output load, as illustrated in Figure 7, for the
maximum load capacitance that can be driven with a 1 Ω series
gate resistance for different values of output voltage. For example,
this curve shows that a typical ADuM3220 can drive a large
MOSFET with 120 nC gate charge at 8 V output (which is equi-
valent to a 15 nF load) up to a frequency of about 300 kHz.
OUTPUT LOAD CHARACTERISTICS
The ADuM3220 output signals depend on the characteristics
of the output load, which is typically an N-channel MOSFET.
The driver output response to an N-channel MOSFET load
can be modeled with a switch output resistance (R
inductance due to the printed circuit board trace (L
series gate resistor (R
as shown in Figure 18.
R
output, which is about 1.5 Ω. R
of the MOSFET and any external series resistance. A MOSFET
that requires a 4 A gate driver would have a typical intrinsic gate
resistance of about 1 Ω and a gate-to-source capacitance, C
between 2 nF and 10 nF. Lt
circuit board trace, typically a value of 5 nH or less for a well
designed layout with a very short and wide connection from the
ADuM3220 output to the gate of the MOSFET.
The following equation defines the Q factor of the RLC circuit,
which indicates how the ADuM3220 output responds to a step
change. For a well damped output, Q is less than one. Adding a
series gate resistance dampens the output response.
In Figure 4 and Figure 5, the ADuM3220 output waveforms for
10 V output are shown for a C
Note the ringing of the output in Figure 5 with C
a calculated Q factor of 1.5, where less than one is desired for
good damping.
Output ringing can be reduced by adding a series gate resistance
to dampen the response. For applications using a 1 nF or less
load, it is recommended to add a series gate resistor of about
5 Ω. As shown in Figure 6, R
Q-factor of about 0.3, and illustrates a damped response in
comparison with Figure 5.
SW
is the switch resistance of the internal ADuM3220 driver
Q
=
(
R
sw
+
1
R
gate
)
gate
×
), and a gate to source capacitance (C
L
C
race
trace
gs
gate
is the inductance of the printed
gs
gate
is 5 Ω, which yields a calculated
of 2 nF and 1 nF, respectively.
is the intrinsic gate resistance
ADuM3220
gs
sw
of 1 nF and
trace
), an
), a
gs
, of
gs
),