cyrf6936 Cypress Semiconductor Corporation., cyrf6936 Datasheet - Page 15

• Manufacturer Part Number: cyrf6936
• Description: Wirelessusb Lp 2.4 Ghz Radio Soc
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-16015 Rev. *G
Mnemonic
Bit
Default
Read/Write
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Start Receive. Setting this bit causes the device to transition to receive mode. If necessary, the crystal oscillator and synthesizer
start automatically after this bit is set. Firmware must never clear this bit. This bit must not be set again until after it clears. The
recommended method to exit receive mode when an error has occurred is to force END STATE and then dummy read all
RX_COUNT_ADR bytes from RX_BUFFER_ADR or poll RSSI_ADR.SOP (bit 7) until set. See XACT_CFG_ADR and
RX_ABORT_ADR for description.
Reserved. Must be zero.
Buffer Full Interrupt Enable. See RX_IRQ_STATUS_ADR for description.
Buffer Half Empty Interrupt Enable. See RX_IRQ_STATUS_ADR for description.
Buffer Not Empty Interrupt Enable. RXB1 IRQEN must not be set when RXB8 IRQEN is set and vice versa. See
RX_IRQ_STATUS_ADR for description.
Buffer Error Interrupt Enable. See RX_IRQ_STATUS_ADR for description.
Packet Reception Complete Interrupt Enable. See RX_IRQ_STATUS_ADR for description.
Receive Error Interrupt Enable. See RX_IRQ_STATUS_ADR for description.
RX GO
R/W
7
0
RSVD
R/W
6
0
RX_CTRL_ADR
RXB16
IRQEN
R/W
5
0
IRQEN
RXB8
R/W
4
0
IRQEN
RXB1
R/W
3
0
RXBERR
IRQEN
R/W
2
1
IRQEN
RXC
R/W
Address
1
1
CYRF6936
Page 15 of 40
IRQEN
R/W
RXE
0
1
0x05
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