ak4560a AKM Semiconductor, Inc., ak4560a Datasheet
ak4560a
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ak4560a Summary of contents
Page 1
... As Multi-Power-Supply-System can be set a suitable power supply voltage in each block, the AK4560A is compatible with high performance and low power dissipation. The package is a 64pin LQFP, therefore, a new system can be a smaller board area than a current system is composed chips. ...
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... IPGA AOUT1 AOUT0 AOUT1 AOUT0 Analog Volume MIX MOUT Headphone - Amp HPP HPR HPL HVCM + MUTE ROUT1 HVDD Figure 1. AK4560A Block Diagram - 2 - [AK4560A] MPWR Pre Amp INT/EXT EQ Amp 48 HPF 47 ADC OFF HPF HPF 46 ON HPF ...
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... VREF 7 AGND ROUT2 10 OPGR 11 LOUT2 12 OPGL 13 BEEP 14 SHT 15 MOUT 16 MS0028-E-00 64pin LQFP (0.5mm pitch Top View [AK4560A] EQ_P_R EQ_O_R HPF_P_R HPF_O_R MIC_IN_R SVDD SVSS INT_EXT_DET SP1 ND SP0 PD MCLK LRCK BCLK CCLK 2000/05 ...
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... Internal MIC Lch Input Pin 60 EXT_MIC_L I External MIC Lch Input Pin 61 MIC_B I MIC-Amp Bias Pin 62 PRE_N_L I Lch Pre-Amp Negative Input Pin 63 PRE_O_L 0 Lch Pre-Amp Output Pin 64 EQ_N_L I Lch EQ-Amp Negative Input Pin Note: All input pins should not be left floating. MS0028-E-00 PIN/FUNCTION Function - 4 - [AK4560A] 2000/05 ...
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... Power Down & Reset Pin, “L”: Power-down & Reset, “H”: Normal operation Noise Decrease Pin, “L”: Disable, “H”: Enable 41 INT_EXT_DET I Internal /External MIC Detect Pin, “L”: Internal MIC, “H”: External MIC Note: All input pins should not be left floating. MS0028-E- [AK4560A] 2000/05 ...
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... AKM assumes no responsibility for the usage beyond the conditions in this datasheet. MS0028-E-00 ABSOLUTE MAXIMUM RATING Symbol VA HVDD MIC VD SVDD GND1 GND2 GND3 IIN VINA1 VINA2 VIND1 VIND2 VIND3 Ta Tstg Pd Symbol min VA 2.6 HVDD 3.8 MIC 2.6 VD 2.6 SVDD 3 [AK4560A] min max Units -0.3 6.0 V -0.3 6.0 V -0.3 6.0 V -0.3 6.0 V -0 -0.3 VA+0 ...
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... MIC Block (Gain: +26dB, Input from INT_MIC_L/INT_MIC_R pins) DAC+LINEOUT (Gain: +7.5dB, Measured via LOUT1/ROUT1 pins) Note 15. Output voltage is typically (MVDD - 1.4) V. MS0028-E-00 ANALOG CHARACTERISTICS 20kHz; unless otherwise specified) min [AK4560A] typ max Units 100 130 k -1 dBV +26 + ...
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... MS0028-E-00 min 5.6 117 LINE 0.1 +0dB -36dB 0.1 -36dB -44dB -44dB -56dB 0.1 - -56dB -68dB - -68dB -80dB -6.3 -32 +1 [AK4560A] typ max Units -0.5 dBV 184 260 k 0 Bits -5.5 -4.7 dBV -31.5 -30.7 dBV ...
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... Note 26. OPGL/OPGR pins are input to –5.5dBV. These values are measured via the following path. Analog volume (OPGA=0dB) MS0028-E-00 min 44 0.1 0.1 0.1 = 220 (Note 24) -6 220 - -6.3 10 Monaural Output (MOUT pin) Monaural Output (MOUT pin [AK4560A] typ max Units 110 205 -5.7 -4.9 dBV 53 dB -80 -74 dBV 100 dB 0.5 dB ...
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... Note 29. As VCOM= “1”, power supply current is 0.5mA (typ.). Note 30. In case of power-down, all digital input pins including clock (MCLK, BCLK and LRCK) pins are held “VD” or “DGND”. PD pin is held “DGND”. MS0028-E-00 min typ 19.0 6.5 3.5 3.5 10.0 8.0 1 [AK4560A] max Units 28.5 mA 9.8 mA 5.3 mA 5.3 mA 15 ...
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... HPF. For DAC, this time is from setting the 16 bit data of both channels on input register to the output of analog signal. MS0028-E-00 FILTER CHARACTERISTICS Symbol min 29 26 [AK4560A] typ max Units 18.9 kHz 21.8 - kHz 23.0 - kHz kHz dB 0.1 dB 17 21.7 kHz 24.0 - ...
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... Units - - typ max Units 12.288 12.8 MHz ns ns 18.432 19.2 MHz kHz ...
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... Note:1. CDTIO pin should not be left floating except READ output timing as CDTIO pin is input pin then. MS0028-E-00 1/fCLK t CLKH tCLKL 1/fs t BLK t t BLKH BLKL Figure 2. Clock Timing t t BLR LRB t LRM D15(MSB SDS SDH Figure 3. Audio Data Input/Output Timing tCSS tCCKL tCCKH tCDS tCDH op0 op1 op2 - 13 - [AK4560A] 1.5V 0.6V 1.5V 0.6V 1.5V 0.6V 1.5V 0.6V 1.5V 0.6V t BSD D14 50%VD 1.5V 0.6V 1.5V 0.6V 1.5V 0.6V 1.5V A0 0.6V 2000/05 ...
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... Notes:1. CDTIO pin should not be left floating except READ output timing as CDTIO pin is input pin then /10% Change. (Pull-up operates for VD SDTO MS0028-E-00 tDCD (Note PDV PDW 0.6V 50%VD Figure 7. Reset Timing - 14 - [AK4560A] 1.5V 0.6V 1.5V 0.6V D2 50%VD tCSW 1.5V 0.6V tCSH 1.5V 0.6V tCCZ Hi - z(Note 2) 2000/05 ...
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... Mode”.) n System Reset AK4560A should be reset once by bringing PD pin “L” upon power-up. After the system reset operation, the all internal AK4560A registers become initial value. Initializing cycle is 8224/fs=171.3ms@fs=48kHz. During initializing cycle, the ADC digital data outputs of both channels are forced to a 2's compliment, “ ...
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... Don’t Care Figure 8. Audio Data Timing Address Control Data Figure 9. Control Data Timing - 16 - [AK4560A ...
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... VOL1 VOL0 ZTM1 ZTM0 0 0 ZELM LMAT1 LMAT0 FDATT 0 REF6 REF5 REF4 0 0 STAT ND 0 IPGA6 IPGA5 IPGA4 OPGA4 Table 1. AK4560A Register Map ADMIX AOUT1 AOUT0 [AK4560A AIN HPF INT/EXT MOUT BEEPH ...
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... OFF (RESET) 1: ON. Output signal of ALC2 is input to Speaker-Amp. SPPS: Speaker-Amp Power-Save-Mode 0: Power-Save-Mode SP0 pin becomes Hi-z and SP1 pin is output to SVDD/2 voltage. (RESET) 1: Normal operation MS0028-E- ALCS BEEPS LOUT R [AK4560A MOUT BEEPH HP VOL 2000/05 ...
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... AK4560A can be powered-down regardless of these bits in the address. When bit in this address goes all “0”, all the circuits in AK4560A can be also powered- down. But contents of registers are kept. When each block is operated, VCOM bit must go “1”. VCOM bit can write “0” when all bits in this address can be “ ...
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... D2:ADC OPGA LINE HP BEEP OUT SHT (*1) D7:LOUTP MOUT ALC2 (*1:OPGA is enabled by controlling D6:SPKP HPP or SPKP bit.) Figure 10. Power Management Control ALC1 ADC ADMIX VA VA OPGA LINE BEEP OUT SHT VA HVDD MOUT ALC2 [AK4560A] DAC D3:DAC VCOM D4:VCOM DAC VA VCOM VA 2000/05 ...
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... R/W RESET DEM1-0: Select De-emphasis Frequency The AK4560A includes the digital de-emphasis filter (tc = 50/15us) by IIR filter. The filter corresponds to three sampling frequencies (32kHz, 44.1kHz and 48kHz). The de-emphasis filter selected DEM0 and DEM1 registers are enabled for input audio data. MONO1-0: Select digital data to input to DAC Table 3 ...
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... Table 7. Zero Crossing Timeout FADEIN/OUT Period FDTM0 48kHz 44.1kHz 0 512/fs 10.7ms 11.6ms 1 1024/fs 21.3ms 23.2ms 0 2048/fs 42.6ms 46.4ms 1 4096/fs 85.2ms 92.8ms Table 8. FADEIN/OUT Period - 22 - [AK4560A WTM1 WTM0 LTM1 LTM0 32kHz 16us RESET 31us 63us 125us 32kHz 16.0ms 32.0ms RESET 64 ...
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... Input -6.0dB RATT GAIN STEP RESET FDATT ATT STEP RESET LMAT1 LMAT0 ATT STEP Table 12. ALC1 Limiter ATT Step Setting - 23 - [AK4560A RATT LMTH RESET -8.0dB RESET 2000/05 ...
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... Table 13. Setting Reference Value at ALC1 Recovery Operation MS0028-E- REF6 REF5 REF4 GAIN(dB) STEP MIC LINE +26.0 +0.0 +25.5 -0.5 +25.0 -1 +0.0 -26.0 0.5dB -0.5 -26 -9.5 -35.5 -10.0 -36.0 -11.0 -37.0 -12.0 -38 1dB -17.0 -43.0 -18.0 -44.0 -20.0 -46.0 -22.0 -48.0 2dB : : -40.0 -66.0 -42.0 -68.0 -46.0 -72.0 4dB -50.0 -76.0 -54.0 -80.0 MUTE MUTE - 24 - [AK4560A REF3 REF2 REF1 REF0 R LEVEL 2000/05 ...
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... STAT bit becomes “1”. During the ALC1 operation, STAT bit becomes “1” after the max “1” ATT/GAIN operation is completed by internal state. MS0028-E- STAT [AK4560A ALC2 FDIN ALC1 FDOUT R 2000/05 ...
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... MS0028-E- IPGA6 IPGA5 IPGA4 GAIN(dB) STEP MIC LINE +26.0 +0.0 +25.5 -0.5 +25.0 -1 +0.0 -26.0 0.5dB -0.5 -26 -9.5 -35.5 -10.0 -36.0 -11.0 -37.0 -12.0 -38 1dB -17.0 -43.0 -18.0 -44.0 -20.0 -46.0 -22.0 -48 2dB -40.0 -66.0 -42.0 -68.0 -46.0 -72.0 -50.0 -76.0 4dB -54.0 -80.0 MUTE MUTE Table 14. Input Gain Setting - 26 - [AK4560A IPGA3 IPGA2 IPGA1 IPGA0 R LEVEL 2000/05 ...
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... MS0028-E- OPGA4 GAIN(dB) STEP LEVEL + 1dB -15 -16 -18 -20 2dB -36 -38 -42 -46 4dB -50 Mute Table 15. ATT value of Analog Volume - 27 - [AK4560A OPGA3 OPGA2 OPGA1 OPGA0 R 2000/05 ...
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... Pre Amp Figure 13. Internal path at selecting External MIC Mode (HPF OFF) MS0028-E-00 FUNCTION DETAIL From Rch HPF OFF - EQ Amp + INT/EXT From Rch HPF + OFF - EQ Amp + INT/EXT - 28 - [AK4560A HPF To ALC1 + - HPF HPF To ALC1 + - HPF 2000/05 ...
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... External MIC Mode is selected, EQ-Amp does not connect. 3. HPF-Amp To cancel wind-noise, AK4560A has the HPF-Amp which is non-inverting amplifier, 2 0dB. The HPF-Amp can be ON/OFF by controlling the internal registers. In case of OFF, HPF-Amp becomes a unity gain buffer. This HPF-Amp can use when Internal MIC Mode is selected. In case of External MIC Mode, the control of HPF-Amp is invalid and becomes a unity gain buffer ...
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... Figure 16. Block Diagram of BEEP and SHT pin MS0028-E-00 Gain=0dB - ADC + ADMIX bit Gain =-4.5dB Figure 15. ADMIX Block Diagram 30% . For example, when R2 is 20k , the final output (20k/20k 5.6dB (Speaker-Amp) = +5.6dB”. (Refer to Figure 16) 10 Rf=20k SPK or HP -Amp + R2 to ADMIX - 30 - [AK4560A] 2000/05 ...
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... ASAHI KASEI n Analog Volume (OPGA) The AK4560A includes the 0dB -50dB & MUTE analog volume with zero crossing detection for headphone and speaker. Zero crossing is detected on L/R channels independently. Zero crossing timeout (To) is proportional to sampling rate. To=512/fs@fs=48kHz=10.7ms. OPGA is not written during counting zero crossing timers. In case of writing control register continually, the change of OPGA should be written after zero crossing timeout and over ...
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... ALC1. Then this mode is doing at every 1step with zero crossing detection. The time constant is about 3sec@fs=32kHz and 3sec@fs=48kHz. In case of doing the FADEIN/FADEOUT operation during noise decreasing operation, the FADEIN/FADEOUT operation starts from the current IPGA value. MS0028-E- [AK4560A] 2000/05 ...
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... Hi-z to decrease a pop noise. And when Power OFF, the pop noise can be decreased by controlling via Power- Save-Mode. MS0028-E-00 LOUT LOUT1/ROUT1 LOUT LOUT LOUTP LOUT - + R1 Figure 19. LINEOUT Normal Operation LOUT LOUT1/ROUT1 LOUT LOUT LOUTP LOUT - + R1 Figure 20. LINEOUT Power-Save-Mode LOUT LOUT1/ROUT1 LOUT LOUT LOUTP LOUT - + R1 Figure 21. LINEOUT Power-Down-Mode - 33 - [AK4560A 2000/05 ...
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... LINEOUT(Low) Figure 22. LINEOUT and Headphone-Amp Level Diagram (@VA=2.8V,OPGA=-8dB,VOL1-0=+7.5dB) MS0028-E-00 +2dBV +11.8dB - 5.5dBV - 10.0dBV +11.8dB - 8dB -25.5dBV HP - Amp - 10dBV +11.8dB Analog Volume - 17.5dBV -25.5dBV OPGA = -8dB - 34 - [AK4560A] +10dBV +6.3dBV 0dBV - 3.4dBV THD+N=1% -10dBV -13.7dBV -20dBV - 30dBV - 13.7dBV ALC2 2000/05 ...
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... AGND to HVCM voltage by the time constants of an internal resistor (R2:typ.10k ) and an external capacitor (C1). (Refer to Figure 25) Figure 23. Headphone-Amps Normal Operation Figure 24. Headphone-Amps Power-Save-Mode Figure 25. Headphone-Amps Power-Down-Mode MS0028-E- HPL/HPR HPP HP HP HPL/HPR HPP HPL/HPR HPP - 35 - [AK4560A 2000/05 ...
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... And when Power OFF (SPKP = “0”), the pop noise can be decreased by controlling via Power-Save-Mode. Figure 26. Speaker-Amp Normal Operation Figure 27. Speaker-Amp Power-Save-Mode MS0028-E-00 SPPS or SP0 SPKP SPPS - + SPPS SPPS SPPS SPPS SPKP SP1 - + R1 SPPS or SP0 SPKP SPPS - + SPPS SPPS SPPS SPPS SP1 SPKP - + [AK4560A 2000/05 ...
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... Period fs=32kHz Zero-crossing Detection ATT/GAIN MS0028-E-00 SPPS or SPKP SP0 SPPS - + SPPS SPPS SPPS SPKP SPPS SP1 - + R1 ALC2 Limiter operation -7.5dBV 2/fs = 42us 2/fs = 63us No 0.5dB step Table 16. Content of ALC2 - 37 - [AK4560A] 8 ALC2 Recovery operation -9.5dBV 2048/fs = 42.7ms 2048/fs = 64ms Yes(Timeout = 2048/fs ) 1dB step 2000/05 ...
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... Figure 29. Speaker-Amp Output Level Diagram (VA=2.8V, OPGA = -8dB, VOL1-0=+7.5dB) MS0028-E-00 -5.5dBV -2dB -8dB -6dB -13.5dBV +18dB -8dB -25.5dBV -10dBV HP -Amp Analog Volume -25.5dBV -17.5dBV ALC2 OPGA = -8dB - 38 - [AK4560A] 0dBV -1.9dBV Full - differential +5.6dB -7.5dBV FS -2dB -7.9dBV Single -ended FS -4dB -10dBV -9.5dBV -0.4dB -20dBV -30dBV SPK 2000/05 ...
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... Recovery waiting counter reset level (LMTH) Figure 30. Disable ALC1 zero crossing detection (ZELM = “1”) (1). When the signal is input between 2dB, the AK4560A does not operate the ALC1 limiter and recovery. MS0028-E-00 ATT level (LMAT1-0) ATT level (LMAT1-0) Limiter update period (LTM1-0) ...
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... Zero crossing timeout is set by ZTM1-0 bits. But the first zero crossing timeout cycle after starting the limiter operation may be the short cycle by the state of the last zero crossing counter. (For example, in case of doing the limiter operation during the recovery operation) MS0028-E-00 (1) (2) (2) (1) (3) Zero crossing timeout (ZTM1- [AK4560A] ATT level (LMAT1-0) ATT level (LMAT1-0) 2000/05 ...
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... During the ALC1 operation, the value of writing in IPGA6-0 bits is ignored. MS0028-E-00 (1) WTM counter starts ZTM counter starts (2) WTM counter starts ZTM counter starts WTM counter starts - 41 - [AK4560A] Limiter detection level (LMTH) Recovery waiting counter reset level (LMTH) Zero crossing detect (2) 2000/05 ...
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... IPGA, the updated channel is keeping the last IPGA value and other channel is updated to a new IPGA value by the last zero crossing counter. Therefore, zero crossing counter does not reset when the zero crossing detection is waiting. MS0028-E- [AK4560A] Gain Level (RATT) 2000/05 ...
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... Figure 34. Registers set-up sequence at ALC1 operation MS0028-E-00 Manual-Mode WR (LMAT1-0, RATT, LMTH) WR (REF6-0) * The value of IPGA should be the WR (IPGA6-0) same or smaller than REF’s. WR (ALC1= “1”) ALC1 Operation Finish ALC1 mode? Yes WR (ALC1= “0”) RD (STAT) STAT = “1”? Yes - 43 - [AK4560A] 2000/05 ...
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... WR (ALC1 = FDIN = “1”): The FADEIN operation starts. The IPGA changes from the MUTE state to the FADEIN operation. (4) The FADEIN operation is done until the limiter detection level (LMTH) or the reference level (REF6-0). After completing the FADEIN operation, the AK4560A becomes the ALC1 operation. (5) FADEIN time can be set by FDTM1-0 and FDATT bits E.g. FDTM1-0 = 1024/ =48kHz = 21.3ms, FDATT = 1step (96 x FDTM1-0) / FDATT = ...
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... WR (IPGA): The IPGA value changes the initial value (exiting MUTE state). (7) WR (ALC1 = “1”, FDOUT = “0”): The ALC1 operation restarts. But the ALC1 bit should not write until completing zero crossing operation of IPGA. (8) Release a mute function of analog and digital outputs externally. MS0028-E-00 (2) (1) (3) (4) (5) ( [AK4560A] (7) (8) 2000/05 ...
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... ASAHI KASEI 64pin LQFP(Unit:mm) 12.0±0.3 10 0.21±0.05 n Package & Lead frame material Package molding compound: Epoxy Lead frame material: Lead frame surface treatment: Solder plate MS0028-E-00 PACKAGE 1.70max 1. 0. 0.45±0.2 0. [AK4560A] 0.10±0.10 0.17±0.05 2000/05 ...
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... ASAHI KASEI 1 - Asashi kasei Logo - Marketing Code: AK4560AVQ - Date Code: XXXXXXX (7 digits) First 4 digits: weekly code, Remains 3 digits: code management in office - Country of Origin: JAPAN These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status ...