ak4120 AKM Semiconductor, Inc., ak4120 Datasheet
ak4120
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ak4120 Summary of contents
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... Sample Rate Converter with Mixer and Volume The AK4120 is a stereo asynchronous sample rate converter. The input sample rate range is from 8kHz to 48kHz. The output sample rate is fixed at 32kHz, 44.1kHz, 48kHz or 96kHz. AK4120 includes a digital mixer and digital volume control. Applications for this device include pro audio mastering, consumer format conversion and desktop audio production and playback ...
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... Pin Layout IMCLK1 1 SDTI1 2 IBICK1 3 ILRCK1 4 TEST 5 I2S 6 I2C 7 CAD0 8 CSN/CAD1 9 CCLK/SCL 10 CDTI/SDA 11 PDN 12 MS0134-E-00 24pin VSOP (0.65mm pitch) Evaluation Board for AK4120 Top View IMCLK2 SDTI2 IBICK2 ILRCK2 I2MODE VDD VSS OMODE OMCLK SDTO OBICK ...
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... Mode. 2 Control Data Pin serial control mode in I Power-Down pin When “L”, the AK4120 is powered-down and reset. L/R Clock Pin for Output Audio Serial Data Clock Pin for Output Audio Serial Data Pin for Output Master Clock Pin for Output Master/Slave select pin for Output Audio Data “ ...
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Note 1) Parameter Power Supplies Input Current, Any Pin Except Supplies Input Voltage Ambient Temperature (Power applied) Storage Temperature Note 1: All voltages with respect to ground. WARNING: Operation at or beyond these limits may result in permanent damage ...
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... Figure 1: Input Sample Rate (FSI) vs. THD+N (FSO=48kHz) -80 -85 -90 -95 -100 -105 -110 -115 -120 10 Figure 2: Input Frequency vs. THD+N (FSI=44.1kHz, FSO=48kHz) MS0134-E- FSI [kHz] 100 1000 10000 Input Frequency [Hz [AK4120] 47 100000 2002/1 ...
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... Note 10. All digital inputs including clock pins are held VSS. MS0134-E-00 DIGITAL FILTER Symbol min 0.5417fs (Note CHARACTERISTICS Symbol min VIH 0.7xVDD VIL - VOH VDD-0.4 VOL - VOL - Iin - - 6 - [AK4120] typ max Units 0.4583fs kHz kHz 0. 56.5 - 1/fs typ Max Units 100 ...
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... Units 2.048 24.576 MHz 2.048 24.576 MHz 8.192 24.576 ...
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... Note 15. BICK rising edge must not occur at the same time as LRCK edge. MS0134-E-00 Symbol min typ fBCK 64fs dBCK 50 tMBLR 25 tBSD 25 tSDH 50 tSDS 50 fBCK 64fs dBCK 50 tMBLR 20 tBSD 20 tSDH 40 tSDS [AK4120] max Units 2002/1 ...
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... Input Filter Power-down & Reset Timing PDN Pulse Width Note 10. Data must be held long enough to bridge the 300 ns transition time of SCL. Note 11. The AK4120 can be reset by bringing PDN “L” to “H” upon power-up. 2 Note 12 registered trademark of Philips Semiconductors. ...
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... LRCK means ILRCK1,ILRCK2 and OLRCK. SDTI means SDTI1 and SDTI2. MS0134-E-00 1/fCLK tCLKL dCLK=tCLKH x fCLK, tCLKL x fCLK 1/fs tBCK tBCKL Clock Timing tLRB tSDS tSDH Audio Interface Timing at Slave Mode - 10 - [AK4120] VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL tBSD 70%VDD 30%VDD VIH ...
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LRCK tMBLR BICK SDTO SDTI CSN tCSS CCLK CDTI WRITE Command Input Timing (3-wire Serial mode) CSN CCLK CDTI D3 WRITE Data Input Timing (3-wire Serial mode) MS0134-E-00 dBCK tSDS tSDH Audio Interface Timing at Master Mode tCCKL tCCKH tCDS ...
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SDA tBUF tLOW tR SCL tHD:STA tHD:DAT Stop Start tPD PDN SDTO MS0134-E-00 tHIGH tF tSU:DAT tSU:STA Start Bus mode Timing tPDV Power-down & Reset Timing - 12 - VIH VIL tSP VIH VIL tSU:STO Stop VIH ...
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... ASAHI KASEI n I/O Data flow The AK4120 has two input audio data interfaces (Input#1 and Input#2). The AK4120 has four modes of operation, each corresponding to a different internal audio path as shown in Table 1. These path modes are selected by the PATH1-0 bits. Path Mode PATH1-0 bits 0 “ ...
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SDTI1 Input#1 Audio ILRCK1 I/F IBICK1 IMCLK1 IMCLK2 SDTI2 Input#2 Audio ILRCK2 I/F IBICK2 I2MODE CAD0 Figure 3. Path Mode 0 (Input#1 SRC + Mixer) SDTI1 ILRCK1 IBICK1 IMCLK1 IMCLK2 SDTI2 Input#2 Audio ILRCK2 I/F IBICK2 I2MODE CAD0 MS0134-E-00 I2S ...
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... Figure 6. Path Mode 3 (Input#2 through output) MS0134-E-00 I2S I2C PDN Output Audio Volume#2 I/F P I/F CSN/CAD1 CCLK/SDL CDTI/SDA I2S I2C PDN Output Audio Volume#2 I/F P I/F CSN/CAD1 CCLK/SDL CDTI/SDA - 15 - [AK4120] VDD VSS TEST OMCLK SDTO OLRCK OBICK OMODE VDD VSS TEST OMCLK SDTO OLRCK OBICK OMODE 2002/1 ...
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... ASAHI KASEI n System Clock The external clocks required to operate the AK4120 in each mode are shown in Table 3 and Table 4. The Input#1 port works in slave mode only. The Input#2 and Output ports have both slave and master modes that are selected by the IMODE2 and OMODE pins. The required external clock shown in Table 2 should be always present whenever the AK4120 normal operating mode (PDN=” ...
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... Volume AK4120 has two digital volumes (Volume#1 and Volume#2). Volume#1 can control the volume level of data from Input#1 while in Path Mode 0 or from Input#2 while in Path Mode 1. It then passes this data through SRC block. Volume#2 can control the volume level of data from Input#2 while in Path Mode 0 and Path Mode 3, or from Input#1 in Path Mode 2. These volume ranges are from – ...
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... Table 8. Audio data formats for Output port Note: When the Audio Serial Interface Mode is changed, the AK4120 should be powered down using the PW bit. (“PW”=0) MS0134-E-00 SDTI1 0 20bit, MSB justified 2 1 20bit 20bit, LSB justified ...
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... Don’t care 19 18 Figure 8. MSB justified Timing Don’t care 19 18 Lch Data 2 Figure Timing - 19 - [AK4120 Rch Data Don’t care 19 ...
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... ASAHI KASEI n Serial Control Interface The AK4120 is controlled via registers. Internal registers can be written using one of two control modes, I2C or 3-wire, that are selected via I2C pin. PDN = “L” initializes the registers to their default values. When the I2C pin is changed, the AK4120 should be reset using the PDN pin. * When PDN= “ ...
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... A LOW to HIGH transition on the SDA line while SCL is HIGH defines a STOP condition (Figure 17). The AK4120 is capable of more than one byte write operation per sequence. After receipt of the third byte, the AK4120 generates an acknowledge, and awaits the next data. The master can transmit multiple bytes rather than terminating the write cycle after the first data byte is transferred ...
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... READ Operations To enable a READ operation in the AK4120, set R/WN bit = “1”. After transmission of data, the master can read the next data address by generating an acknowledge instead of terminating the write cycle after the receipt the first data word. After the receipt of each data, the internal 5-bit address counter is incremented by one, and the next data is taken into next address automatically. If the address exceeds 06H prior to generating the stop condition, the address counter will “ ...
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... Note: Only addresses 00H through 06H are valid write addresses. All others should not be read from or written to. MS0134-E-00 Figure 17. START and STOP conditions Figure 18. Acknowledge on the I C-bus data line change stable; of data data valid allowed 2 Figure 19. Bit transfer on the I C-bus - 23 - [AK4120] P stop condition not acknowledge acknowledge 8 9 clock pulse for acknowledgement 2002/1 ...
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... System Reset The AK4120 is reset by bringing the power down pin “PDN” =“L”. The digital filters are also reset when this occurs. The AK4120 should be reset once by bringing PDN =“L” upon power-up. After a reset, the required clocks shown in Table 2 must be input. ...
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... GAIN4 GAIN3 DIFO1 DIFO0 ZELM ZTM1 ZTM0 [AK4120 Default 80H DIFI11 DIFI20 DIFI10 OMCKS IMCKS2 IMCKS1 20H 00H 0 PATH1 PATH0 10H GAIN2 GAIN1 GAIN0 10H GAIN2 GAIN1 GAIN0 10H GAIN2 ...
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... ZTM0 48kHz 44.1kHz 0 513/fs 10.7ms 11.6ms 1 1025/fs 21.4ms 23.2ms 0 2049/fs 42.7ms 46.5ms 1 4097/fs 85.4ms 92.9ms Table 9. Time of Timeout MUTE2R MUTE2L MUTE1R MUTE1L [AK4120] 32kHz 16.0ms 32.0ms Default 64.0ms 128.0ms PATH1 PATH0 2002/1 ...
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... GAIN4 0 GAIN6 GAIN5 GAIN4 Volume Level 12dB 11.25dB 10.5dB : : 0.75dB 0dB Default -0.75dB : : -81.75 -82.50 -83.25 Table 10. Output Volume level - 27 - [AK4120 GAIN3 GAIN2 GAIN1 GAIN0 GAIN3 GAIN2 GAIN1 GAIN0 GAIN3 GAIN2 GAIN1 GAIN0 GAIN3 GAIN2 GAIN1 GAIN0 2002/1 ...
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... SDTI2 23 IBICK2 22 ILRCK2 21 I2M AK4120 0.1u 3.3V Supply Top View OBICK Figure 21. Example of a typical design - 28 - [AK4120] Analog Input Audio 2002/1 ...
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... VSOP (Unit *7.8 0. 0.22 0.1 Seating Plane 0.10 NOTE: Dimension "*" does not include mold flash. n Package & Lead frame material Package molding compound: Lead frame material: Lead frame surface treatment: MS0134-E- 0.65 0.15 0.05 Detail A Epoxy Cu Solder plate (Pb free [AK4120] 1.25 0.2 0.1 0.1 0-10 2002/1 ...
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... MS0134-E- AK4120VF AAXXXX Contents of AAXXXX AA: Lot# XXXX: Date Code IMPORTANT NOTICE - 30 - [AK4120 2002/1 ...