ak4141 AKM Semiconductor, Inc., ak4141 Datasheet - Page 32

• Manufacturer Part Number: ak4141
• Description: Nicam/a2/eia-j Digital Stereo Decoder
• Manufacturer: AKM Semiconductor, Inc.

(2)-2. WRITE Operations
Set R/W bit = “0” for the WRITE operation of the AK4141.
After receipt the start condition and the first byte, the AK4141 generates an acknowledge, and awaits the second byte
(register address). The second byte consists of the address for control registers of AK4141. The format is MSB first.
After receipt the second byte, the AK4141 generates an acknowledge, and awaits the third byte. Those data after the
second byte contain control data. The format is MSB first, 8bits.
The AK4141 is capable of more than one byte write operation by one sequence.
After receipt of the third byte, the AK4141 generates an acknowledge, and awaits the next data again. The master can
transmit more than one word instead of terminating the write cycle after the first data word is transferred. After the receipt
of each data, the internal 8bits address counter is incremented by one, and the next data is taken into next address
automatically. If the address exceeds TBDH prior to generating the stop condition, the address counter will “roll over” to
00H and the previous data will be overwritten.
MS0952-E-00
SDA
A7
D7
S
T
A
R
T
S
Slave
Address
A6
D6
Figure 23. Byte structure after the second byte
A
C
K
A5
D5
Figure 24. WRITE Operation
Register
Address(n)
Figure 22. The Second Byte
A4
D4
A
C
K
- 32 -
Data(n)
D3
A3
A
C
K
Data(n+1)
A2
D2
A
C
K
A1
D1
Data(n+x)
A0
D0
S
T
O
P
P
[AK4141]
2008/05