am79c864a Advanced Micro Devices, am79c864a Datasheet - Page 29

• Manufacturer Part Number: am79c864a
• Description: Physical Layer Controller With Scrambler Plc-s
• Manufacturer: Advanced Micro Devices

Addr
(Hex)
17
Bit
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
NP
ERR
15
Name
NP_ERR
LSDO
LE_CTR
MINI_CTR
VSYM_CTR
PHYINV
EBUF_ERR
TNE_EXPIRED
TPC_EXPIRED
PCM_ENABLED
PCM_BREAK
SELF_TEST
TRACE_PROP
PCM_CODE
LS_MATCH
PARITY_ERR
LSDO
14
IE
CTR
13
MINI
CTR
12
Definition
An event indicating that the Node Processor has requested a read or write to an invalid
register. This case includes a write to a read-only register (such as this one), a read of
a write-only register, a write to a XMIT_VECTOR or VECTOR_LENGTH register when
PCM_SIGNALLING is set, a write to the TPC Timer register while the PCM is not in the
MAINT state, and a write to the TNE Timer register while the PCM is not in the MAINT
state or NOISE_TIMER is set.
This bit is set whenever SD0 pin is asserted.
An event indicating that the Link Error Event Counter has reached the value contained
in the LE_THRESHOLD register.
Indicates that either of two events has occurred in the MIN_IDLE_CTR: the Idle
Counter Minimum Detector has changed to a lower value; or, the Minimum Idle Gap
Counter has incremented or overflowed, depending on the MINI_CTR_INTRS bit in
the PLC_CNTRL_A register.
An event indicating that a Violation Symbol Counter has incremented or overflowed,
depending on the VSYM_CTR_INTRS bit in the PLC_CNTRL_A register.
An event indicating that the Physical Layer Invalid signal has been asserted.
An event indicating that the Elasticity Buffer has detected an overflow or underflow.
An event indicating that the TNE Timer has expired, i.e. reached zero.
An event indicating that the TPC Timer has expired, i.e. reached zero.
An event indicating the PCM has asserted SC_JOIN, has completed scrubbing, and is
in the ACTIVE state.
An event indicating the PCM has entered the BREAK state.
An event indicating Quiet or Halt Line State has been received while the PCM is in the
TRACE state.
An event indicating that Master Line State has been received while the PCM is in the
ACTIVE or TRACE state.
An event indicating the PCM has completed transmitting the last bit in the vector
written to the XMIT_VECTOR register and has received the corresponding bit of the
RCV_VECTOR, or that the Link Confidence Test has completed. In the case where
signalling has completed, PCM_CODE will not be set until the RCF flag has been set
again.
An event indicating that the line state detected equals the line state in the MATCH_LS
field of the PLC_CNTRL_B register.
An event indicating that a parity error has been detected on the TX 9–0 input pins.
This bit will not be set if ENA_PAR_CHK bit in PLC_CNTRL_A register is cleared.
VSYM
CTR
11
PHYINV
10
Table 10. INTR_EVENT Register
EBUF
ERR
P R E L I M I N A R Y
9
Am79C864A
INTR-EVENT
TNE
EXPIRED
8
TPC
EXPIRED
7
PCM
ENABLED
6
PCM
BREAK
5
SELF
TEST
4
TRACE
PROP
3
PCM
CODE
2
LS
MATCH
1
15535B-12
AMD
PARITY
ERR
0
3-31