s71gl128nb0 Meet Spansion Inc., s71gl128nb0 Datasheet - Page 66

• Manufacturer Part Number: s71gl128nb0
• Description: Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 32 Megabit 2m X 16-bit Psram
• Manufacturer: Meet Spansion Inc.

WC = Word Count is the number of write buffer locations to load minus 1.
PWD = Password
PWD
DATA = Lock Register Contents: PD(0) = Secured Silicon Sector Protection Bit, PD(1) = Persistent Protection Mode Lock Bit, PD(2)
= Password Protection Mode Lock Bit.
Notes:
1. See
2. All values are in hexadecimal.
3. Except for the read cycle, and the 4th, 5th, and 6th cycle of the autoselect command sequence, all bus cycles are write
4. Data bits DQ15-DQ8 are don't cares for unlock and command cycles.
5. Address bits A
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high
8. The fourth, fifth, and sixth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more
10. The data value for DQ7 is “1” for a serialized and protected OTP region and “0” for an unserialized and unprotected Secured
11. Command is valid when device is ready to read array data or when device is in autoselect mode.
12. The Unlock-Bypass command is required prior to the Unlock-Bypass-Program command.
13. The Unlock-Bypass-Reset command is required to return to reading array data when the device is in the unlock bypass
14. The system may read and program/program suspend in non-erasing sectors, or enter the autoselect mode, when in the
15. The Erase Resume/Program Resume command is valid only during the Erase Suspend/Program Suspend modes.
16. Issue this command sequence to return to READ mode after detecting device is in a Write-to-Buffer-Abort state. NOTE: the
17. S29GL512NH/L = 2223h/23h, 220h/01h; S29GL256NH/L = 2222h/22h, 2201h/01h; S29GL128NH/L = 2221h/21h, 2201h/
18. The Exit command returns the device to reading the array.
19. Note that the password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
20. For PWDx, only one portion of the password can be programmed per each “A0” command.
21. The All PPB Erase command embeds programming of all PPB bits before erasure.
22. All Lock Register bits are one-time programmable. Note that the program state = “0” and the erase state = “1”. Also note
23. If any of the Entry command was initiated, an Exit command must be issued to reset the device into read mode. Otherwise
24. If ACC = V
25. Protected State = “00h”, Unprotected State = “01h”.
66
cycles.
Address pin.).
(while the device is providing status data).
information. This is same as PPB Status Read except that the protect and unprotect statuses are inverted here.
Silicon Sector region. See “Secured Silicon Sector Flash Memory Region” for more information. For Am29LVxxxMH: XX18h/
18h = Not Factory Locked. XX98h/98h = Factory Locked. For Am29LVxxxML: XX08h/08h = Not Factory Locked. XX88h/88h
= Factory Locked.
mode.
Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation.
full command sequence is required if resetting out of ABORT while using Unlock Bypass Mode.
01h.
that of both the Persistent Protection Mode Lock Bit and the Password Protection Mode Lock Bit cannot be programmed at the
same time or the Lock Register Bits Program operation will abort and return the device to read mode. Lock Register bits that
are reserved for future use will default to “1's”. The Lock Register is shipped out as “FFFF's” before Lock Register Bit program
execution.
the device will hang.
x
= Password word0, word1, word2, and word3.
Table 1
HH
for description of bus operations.
, sector protection will match when ACC = V
MAX
:A16 are don't cares for unlock and command cycles, unless SA or PA required. (A
S29GLxxxN MirrorBit
A d v a n c e
IH
TM
Flash Family
I n f o r m a t i o n
S29GLxxxN_00_A4 June 14, 2004
MAX
is the Highest