s71gl128nb0 Meet Spansion Inc., s71gl128nb0 Datasheet - Page 76

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s71gl128nb0

Manufacturer Part Number
s71gl128nb0
Description
Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 32 Megabit 2m X 16-bit Psram
Manufacturer
Meet Spansion Inc.
Datasheet

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Notes:
1. DQ5 switches to ‘1’ when an Embedded Program, Embedded Erase, or Write-to-Buffer operation has exceeded the
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for
3. The Data# Polling algorithm should be used to monitor the last loaded write-buffer address location.
4. DQ1 switches to ‘1’ when the device has aborted the write-to-buffer operation
Absolute Maximum Ratings
76
Standard
Write-to-
Program
Suspend
Suspend
Buffer
maximum timing limits. Refer to the section on DQ5 for more information.
further details.
Erase
Mode
Mode
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase-Suspend-Program
(Embedded Program)
Busy (Note 3)
Abort (Note 4)
Program-
Suspend
Suspend
Erase-
Read
Read
Storage Temperature, Plastic Packages . . . . . . . . . . . . . . . . –65°C to +150°C
Ambient Temperature with Power Applied . . . . . . . . . . . . . . –65°C to +125°C
Voltage with Respect to Ground:
Output Short Circuit Current (Note 3). . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Notes:
1. Minimum DC voltage on input or I/Os is –0.5 V. During voltage transitions, inputs
2. Minimum DC input voltage on pins A9, OE#, ACC, and RESET# is –0.5 V. During
3. No more than one output may be shorted to ground at a time. Duration of the short
4. Stresses above those listed under “Absolute Maximum Ratings” may cause
Status
or I/Os may overshoot V
Maximum DC voltage on input or I/Os is V
input or I/O pins may overshoot to V
8.
voltage transitions, A9, OE#, ACC, and RESET# may overshoot V
periods of up to 20 ns. See
ACC, and RESET# is +12.5 V which may overshoot to +14.0V for periods up to 20
ns.
circuit should not be greater than one second.
permanent damage to the device. This is a stress rating only; functional operation
V
V
A9, OE#, ACC and RESET# (Note 2) . . . . . . . . . . . . . –0.5 V to +12.5 V
All other pins (Note 1) . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
IO
Program-Suspended
Sector
Non-Program
Suspended Sector
Erase-Suspended
Sector
Non-Erase
Suspended Sector
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.5 V to +4.0 V
(Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.5 V to +4.0 V
Table 12. Write Operation Status
S29GLxxxN MirrorBit
SS
A d v a n c e
(Note 2)
to –2.0 V for periods of up to 20 ns. See
Figure
DQ7#
DQ7#
DQ7#
DQ7#
DQ7
0
1
7. Maximum DC input voltage on pin A9, OE#,
CC
No toggle
+ 2.0 V for periods up to 20 ns. See
Toggle
Toggle
Toggle
Toggle
Toggle
DQ6
TM
CC
Flash Family
I n f o r m a t i o n
+ 0.5 V. During voltage transitions,
Invalid (not allowed)
(Note 1)
DQ5
0
0
0
0
0
0
Data
Data
DQ3
N/A
N/A
N/A
N/A
N/A
1
SS
to –2.0 V for
Figure
No toggle
(Note 2)
CC
Toggle
Toggle
DQ2
+12.5 V
N/A
N/A
N/A
Figure
S29GLxxxN_00_A4 June 14, 2004
7.
DQ1
N/A
N/A
N/A
0
0
1
BY#
RY/
0
0
1
1
1
1
0
0
0

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