ocx256 ETC-unknow, ocx256 Datasheet - Page 45

• Manufacturer Part Number: ocx256
• Description: Ocx256 Crosspoint Switch
• Manufacturer: ETC-unknow

7. Component Availability and Ordering Information
8. Glossary
Fairchild Semiconductor
CLOCK: A single differential input used to gate data into registers in the Output Buffer. The input serves all
outputs of the OCX. The neighbor input can also be used as a register clock.
CROSSPOINT: A single cell controlled by two RAM bits. The RAM bits are connected in a master-slave
configuration to provide an update for programming and changing program information all at once.
CROSSPOINT ARRAY: An array of Crosspoint cells used to connect any input port to any output port.
INPUT OR OUTPUT PATH: The signal flow from pin to array and array to pin. Each path has a register with
selectable clocks, drivers for the loaded outputs with selectable enables, and sense circuits to detect changes on
either side of the IO Buffer.
NEXT NEIGHBOR: A physically adjacent port can be used as a clock source for an output configured in
registered mode. These outputs are grouped in pairs such that the signal being switched through Output 0 can be
used to clock the signal being switched through Output 1, or vice-versa. Any single clock or data input signal
can be used to clock any other input signal provided they are switched to an appropriate output pair.
PORT: A name followed by a number to identify a pin on the device.
RAPIDCONFIGURE: A parallel programming method for the OCX devices. The RC mode uses 25 dedicated
pins to program the Crosspoint Array and the IO Buffers. The 25 pins consist of an enable, a clock, four
instruction bits, two seven-bit address fields, and a five-bit data field.
Family
# I/O Ports
I/O
Package Code
Temperature Range
L = LVDS
P = LVPECL
TB792 = 792 Pin Thin Ball Grid Array
Blank - Commercial (0°C to 70°C)
I - Industrial (-40°C to +85°C)
OCX256 Crosspoint Switch—Advanced Datasheet
[Rev. 2.0] 3/21/02
OCXxxxx - PPT
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