co561ad-l Connect One Ltd., co561ad-l Datasheet

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co561ad-l

Manufacturer Part Number
co561ad-l
Description
The Co561ad-l Ichip Lan? Internet Controller? Is Part Of A Family Of Intelligent Peripheral Devices That Provides Internet Connectivity Solutions To A Myriad Of Embedded Devices.
Manufacturer
Connect One Ltd.
Datasheet
Pub. No. 11-3700-00, ©Copyright January 2003
iChip LAN CO561AD-L
Datasheet
iChip LAN
Ver. 1.04
International:
Connect One Ltd.
2 Hanagar Street
Kfar Saba 44425, Israel
Tel: +972-9-766-0456
Fax: +972-9-766-0461
E-mail: info@connectone.com
http://www.connectone.com
TM
USA:
Connect One Semiconductors, Inc.
15818 North 9th Ave.
Phoenix, AZ 85023
Tel: 408-986-9602
Fax: 602-485-3715
E-mail: info@connectone.com
http://www.connectone.com

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co561ad-l Summary of contents

Page 1

... LAN iChip LAN CO561AD-L Datasheet Pub. No. 11-3700-00, ©Copyright January 2003 TM Ver. 1.04 International: Connect One Ltd. 2 Hanagar Street Kfar Saba 44425, Israel Tel: +972-9-766-0456 Fax: +972-9-766-0461 E-mail: info@connectone.com http://www.connectone.com USA: Connect One Semiconductors, Inc. 15818 North 9th Ave. ...

Page 2

... Connect One. iChip, iChip LAN, Socket iChip, Embedded iModem, Internet Controller, iLAN, iConnector, iModem, Instant Internet, AT+i, and Connect One are trademarks of Connect One Ltd. Copyright  2000 - 2002 Connect One Ltd. All rights reserved. iChip CO561AD-L Datasheet ii ...

Page 3

... Revision History 11-3700-00 Version Date 1.0 November 2002 1.04 January 2003 iChip CO561AD-L Datasheet Description Changed data sheet format of publication 11-3100-07. Separated CO561AD-S and CO561AD-L data sheets. Updated pin descriptions. Deleted pin LANDRQ. Internal Editing Revision History iii ...

Page 4

... Remote Internet Firmware Update............................................................... 3-2 3.2.5 Host Serial Connection ................................................................................ 3-2 3.2.6 Hardware and Software Flow Control ......................................................... 3-2 4 Hardware Interface................................................................................................. 4-1 4.1 Host Interface............................................................................................... 4-1 4.2 LAN Interface .............................................................................................. 4-2 5 Pin Descriptions....................................................................................................... 5-1 5.1 iChip LAN CO561AD-L Pin Assignments ................................................. 5-1 5.2 iChip LAN Pin Functional Descriptions...................................................... 5-2 5.2.1 Local BUS Signals....................................................................................... 5-2 5.2.2 Miscellaneous Signals.................................................................................. 5-4 5.2.3 Host Interface Signals .................................................................................. 5-5 6 Electrical/Mechanical Specifications ..................................................................... 6-1 6.1 Environmental Specifications ...................................................................... 6-1 6.1.1 Absolute Maximum Ratings ...

Page 5

... Supervisory Circuit ...................................................................................... 7-3 8 Protocol Compliance ............................................................................................... 8-1 9 List of Terms and Acronyms.................................................................................. 9-1 iChip CO561AD-L Datasheet Contents v ...

Page 6

... Figure 1-1 iChip LAN Functional Block Diagram ......................................................... 1-2 Figure 4-1 iChip LAN CO561AD-L with LAN Interface ................................................. 4-2 Figure 5-1 PLCC68 Package for iChip LAN CO561AD-L Serial Version ..................... 5-1 Figure 6-1 Local BUS Read Cycle................................................................................... 6-4 Figure 6-2 Local BUS Write Cycle.................................................................................. 6-5 Figure 6-3 Clock Waveform............................................................................................. 6-5 Figure 6-4 Mechanical Dimensions................................................................................. 6-6 Figure 7-1 CS8900A Ethernet Controller Environment.................................................. 7-1 Figure 7-2 RTL8019AS Ethernet Controller Environment ...

Page 7

... Table 4-1 Host Data Format............................................................................................ 4-1 Table 6-1 Environmental Specifications.......................................................................... 6-1 Table 6-2 DC Operating Characteristics 3.3V Version................................................... 6-2 Table 6-3 DC Operating Characteristics 5V Version...................................................... 6-2 Table 6-4 Switching Characteristic ................................................................................. 6-3 Table 8-1 Internet Protocol Compliance ......................................................................... 8-1 Table 9-1 Terms and Acronyms ....................................................................................... 9-2 iChip CO561AD-L Datasheet Tables Tables vii ...

Page 8

... Controller™ is part of a family of intelligent peripheral devices that provides Internet connectivity solutions to a myriad of embedded devices. iChip LAN, CO561AD-L, is used for 10BaseT Ethernet LAN Internet connectivity embedded, self-contained Internet engine, iChip LAN acts as mediator device between a host processor and an Internet communications platform ...

Page 9

... Supports several layers of status reports. Internal self-test procedures. • • Auto baud rate detection. • Includes hardware and software flow control. • PLCC68 package. iChip CO561AD-L Datasheet AD0-AD15 128 KB A0-A19 -RD -WR -LANINT General Protocols • Supports following Internet Protocols: • ...

Page 10

... Connect One’s iChip LAN devices are available in two operating voltages. The order number is formed by a combination of the elements below: CO561AD-L Product Code Version LAN Clock 18.432 MHz Package PLCC 68 Pin Temperature Range Commercial (0 to70º 158° Voltage 3.3V iChip CO561AD-L Datasheet / – Ordering Information 5 2-1 ...

Page 11

... Connect One’s AT+i extension to the standard AT command set. 3.2.2 Data Rates CO561AD-L supports standard baud rate configurations from 2,400 bps up to 115,200 bps on the host asynchronous serial communications channel. The default baud rate may be changed permanently by using the AT+iBDRF command. Auto baud rate setting is supported for all baud rates ...

Page 12

... The host can program iChip LAN to either use hardware flow control or to use “Wait/Continue” software flow control between iChip LAN and the host CPU. Hardware flow control mechanism is based on the RTS/CTS signals. iChip CO561AD-L Datasheet Functional Description 3-2 ...

Page 13

... Parity Data Length (No. of Bits) None 1 Note: When hardware flow control is enabled the iChip transmitter will add an additional stop bit. iChip CO561AD-L Datasheet No. of Stop Bits Table 4-1 Host Data Format Hardware Interface Transmission Length (No ...

Page 14

... LAN directly interfaces an Ethernet LAN MAC/PHY device on its 16-bit local BUS. Currently iChip LAN supports the Crystal LAN CS8900A and Realtek RTL8019AS Ethernet controllers. Rx,Tx, Host CTS,RTS,DTR,DSR, Figure 4-1 iChip LAN CO561AD-L with LAN Interface iChip CO561AD-L Datasheet CPU Core Internal FLASH 512 KB ...

Page 15

... AD2 5 AD1 6 AD0 7 A17 8 AD7 9 AD14 10 AD13 11 -RES 12 AD11 13 -UCS 14 -DSRH 15 AD10 16 AD9 17 Figure 5-1 PLCC68 Package for iChip LAN CO561AD-L Serial Version iChip CO561AD-L Datasheet TM iChip LAN CO561AD-L Pin Descriptions A13 51 A19 50 A15 49 A12 48 A14 A16 45 CLKO ALE ...

Page 16

... O 14 -LCS O 21 iChip CO561AD-L Datasheet Description Address BUS: These pins supply addresses to the system one-half of a CLKO period earlier than the multiplexed address and data BUS AD15–AD0. During a BUS hold or reset condition, the address BUS HIGH-impedance state. ...

Page 17

... iChip CO561AD-L Datasheet Description BUS HIGH Enable: This pin and the least-significant address bit (AD0 or A0) indicate to the system, which bytes of the data BUS (upper, lower, or both) participate in a BUS cycle. The ~BHE and A0 pins are encoded as shown in the table below. ...

Page 18

... O 60 -RIH O 20 iChip CO561AD-L Datasheet Description UART Interrupt: This pin is for debugging purpose only. This pin should be pulled up to VCC. LAN Mode Select: • When this pin is held LOW during power up for at least 5 seconds, iChip LAN will automatically enter firmware update mode. ...

Page 19

... N.C 18, 27, 28 29, 32, 66 iChip CO561AD-L Datasheet Description LAN Interrupt. When high, this signal indicates that the LAN controller has information for iChip LAN. Crystal Input: This pin and the X2 pin provide connections for a fundamental mode or third- overtone, parallel-resonant crystal used by the internal oscillator circuit ...

Page 20

... I 15 -DTRH O 63 iChip CO561AD-L Datasheet Description Transmit Data Host: This pin supplies asynchronous serial transmit data to the host. Receive Data Host: This pin supplies asynchronous serial receive data from the host. When this pin is not used, connect it to VCC. ...

Page 21

... Voltage at any pin with respect to ground -0.5 to VCC + 0.5 Volts Operating temperature Storage temperature Soldering temperature (max. 10 sec.) Package dissipation Table 6-1 Environmental Specifications iChip CO561AD-L Datasheet Electrical/Mechanical Specifications Rating 0°C to 70°C (32 to 158°F) -60°C to 120°C (–76 to 248°F) 220°C (428°F) 1 ...

Page 22

... HIGH-level Input for X1 LOW-level Output 2 Input leakage current Power supply current (Operating Mode) 3 Input capacitance Notes 2.4mA 2mA MHz clock 3 Table 6-3 DC Operating Characteristics 5V Version iChip CO561AD-L Datasheet Electrical/Mechanical Specifications Min Typical Max 3.0 3.3 3.6 2.0 VCC+0.5 VCC-0.8 VCC+0.5 -0.5 0.8 VCC-0.5 VCC 0.45 +/- ...

Page 23

... X1 rise time (2) X1 LOW time X1 HIGH time X1 to CLKO skew (1) Fall time on 5V version is from 3. and on 3V version is from 2V to 1V. (2) Rise time on 5V version is from 1V to 3.5V and on 3V version is from 1V to 2V. iChip CO561AD-L Datasheet Electrical/Mechanical Specifications Symbol Min. Typical Fclk 18 ...

Page 24

... Local BUS Read Cycle Tclk CLKO Tavrl Address A19-A0 AD15-AD0 (Read) UCS LCS ALE ~RD ~BHE iChip CO561AD-L Datasheet Electrical/Mechanical Specifications Tdvcl Trlrh Tclrl ~BHE Figure 6-1 Local BUS Read Cycle Data Tcldx 6-4 ...

Page 25

... Tclk CLKO Tavwl Address A19-A0 AD15-AD0 (Write) Tcldv UCS LCS ALE -WR -BHE 6.2.4 Clock Waveform X2 X1 CLKO Tcklh iChip CO561AD-L Datasheet Electrical/Mechanical Specifications Data Twlwh Tcvctv ~BHE Figure 6-2 Local BUS Write Cycle Tchck Tclck Tckhl Tchck Tcico Figure 6-3 Clock Waveform Tcldox Tcvctx 6-5 ...

Page 26

... Mechanical Dimensions 1.27mm / 0.050” 1 24.5mm / 0.965” 4 0.193” 2. 0.106” Figure 6-4 Mechanical Dimensions iChip CO561AD-L Datasheet Electrical/Mechanical Specifications 0 0.020” CO561AD-L iChip LAN 25.2mm / 0.995” 1. 0.070” 6-6 ...

Page 27

... Figure 7-1 CS8900A Ethernet Controller Environment Note: CS8900A is available for 3.3 and 5-voltiChip LAN. 7.1.1 Ethernet Controller Environment with Realtek RTL8019AS iChip Embedded Serial LAN CPU (Host) Figure 7-2 RTL8019AS Ethernet Controller Environment Note: RTL8019AS is appropriate only for 5-volt iChip LAN. iChip CO561AD-L Datasheet D0-15 CS8900A A0-19 Ethernet -RD Controller -WR LANINT D0-15 ...

Page 28

... The recommended range of values for C 1 and C 2 are as follows ............................................................... 15 pF ± 20 ............................................................... 22 pF ± 20% The specific values for C1 and C2 must be determined by the designer and are dependent on the characteristics of the chosen crystal and board design. iChip CO561AD-L Datasheet X1 Crystal X2 Figure 7-3 Selecting a Crystal. ...

Page 29

... Supervisory Circuit Vcc Vcc R1 C11 4.7K 0.1UF GND PFI GND MAX708R GND C15 + 1UF/16V GND Figure 7-5 Supervisory Reset Circuit iChip CO561AD-L Datasheet τ should be greater than 10 mSec. 10K -RES 10U Figure 7-4 RC Reset Circuit RESET -RES 7 RESET 5 PFO iChip LAN Designs 7-3 ...

Page 30

... Protocol Compliance iChip LAN CO561AD-L complies with the following Internet standards: User Datagram Protocol (UDP) RFC 768 Internet Protocol (IP) RFC 791 RFC 792 Internet Control Message Protocol (ICMP) RFC 793 Transmission Control Protocol (TCP) RFC 821 Simple Mail Transfer Protocol (SMTP) ...

Page 31

... ICMP protocol ECHO message and its reply. Often used to debug IP networks and to test the accessibility of a network device. POP3 Post Office Protocol Version 3. Allows a workstation/PC to dynamically retrieve mail from a mailbox kept on a remote server. iChip CO561AD-L Datasheet Terms and Acronyms 9-1 ...

Page 32

... Transmission Control Protocol. Provides reliable stream-oriented TCP connections over the Internet. Works in conjunction with its underlying IP protocol. Telnet Network Terminal Protocol. Provides remote terminal connectivity, which allows to execute tasks on a remote application server. iChip CO561AD-L Datasheet Table 9-1 Terms and Acronyms Terms and Acronyms 9-2 ...

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